When TEC_CNTR_EN = 1, each SCS falling edge the TEC counter will be captured to the TEC_CNTR field. Subsequent to a SPI transaction which reads from the MSB of the TEC_CNTR field, no falling edge of SCS will capture the TEC counter to the TEC_CNTR field until the LSB of the TEC_CNTR field is read.

Figure 8-33 shows when the TEC is latched during single register reads and Figure 8-34 for a multibyte read.

Figure 8-33 shows that the TEC counter is captured every falling SCS edge until TEC_CNTR MSB is read.

Figure 8-34 shows that the TEC counter value can be captured and re-armed for capture during a single multibyte read, even if the first register read is not the TEC_CNTR registers.