ZHCSMJ6B November 2020 – March 2021 LMK5C33216
PRODUCTION DATA
When DPLLx_PHS1_EN is selected, it enables Phase Slew Control during holdover exit. It will make the output phase transient (phase hit) as DPLLx_PHS1_THRESH and DPLLx_PHS1_TIMER defined when the DPLL switches from APLL-only mode or holdover mode to DPLL Lock Acquisition mode, or hitless switching with two inputs are not frequency-locked. When both Phase Cancellation function and Phase Slew Control function are disabled, a phase hit equal to the phase offset between XO and selected input or between the two inputs at the moment of switching will be propagated to the output at a rate determined by the DPLL fastlock bandwidth. In the case where two inputs are switched but are not frequency-locked Phase Slew Control function can achieve, the output smoothly transitions to the new frequency as the rate the user defined.