6.2 ESD Ratings
|
VALUE |
UNIT |
V(ESD) |
Electrostatic discharge |
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) |
Pins +IN and -IN |
±4000 |
V |
All pins except +IN and -IN |
±2000 |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) |
±1250 |
Machine model |
±250 |
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.7 Electrical Characteristics: 12 V
Unless otherwise specified, all limits ensured for at TA = 25°C, VS= V+ - V-, V+ = 12 V, V− = 0 V, −2 V < VCM < 76 V, Rg= 25 kΩ, RL = 10 kΩ.(3)
PARAMETER |
TEST CONDITIONS |
MIN(5) |
TYP(4) |
MAX(5) |
UNIT |
VOFFSET |
Input Offset Voltage |
VCM = 2.1 V |
–1 |
|
1 |
mV |
VCM = 2.1 V, –40°C ≤ TJ ≤ 125°C |
–1.7 |
|
1.7 |
TCVOS |
Input Offset Voltage Drift(6)(8) |
VCM = 2.1 V |
|
|
7 |
μV/°C |
IB |
Input Bias Current(9) |
VCM = 2.1 V |
|
13 |
23 |
μA |
eni |
Input Voltage Noise(8) |
f > 10 kHz, RG = 5 kΩ |
|
120 |
|
nV/√Hz |
VSENSE(MAX) |
Max Input Sense Voltage(8) |
VCM =12 V, RG = 5 kΩ |
|
600 |
|
mV |
Gain AV |
Adjustable Gain Setting(8) |
VCM = 12 V |
1 |
|
100 |
V/V |
Gm |
Transconductance = 1/RIN |
VCM = 2.1 V |
|
200 |
|
µA/V |
Accuracy |
VCM = 2.1 V |
–2% |
|
2% |
|
VCM = 2.1 V, –40°C ≤ TJ ≤ 125°C |
–3.4% |
|
3.4% |
Gm drift(8) |
−40°C to 125°C, VCM =2.1 V |
|
|
140 |
ppm /°C |
PSRR |
Power Supply Rejection Ratio |
VCM = 2.1 V, 2.7 V < V+ < 12 V |
85 |
|
|
dB |
CMRR |
Common-Mode Rejection Ratio |
2.1 V < VCM < 76 V |
95 |
|
|
dB |
–2 V < VCM < 2.1 V |
55 |
|
|
SR |
Slew Rate(7)(8) |
VCM = 5 V, CG = 4 pF, VSENSE from 100 mV to 500 mV, CL = 30 pF, RL=1 MΩ |
|
0.6 |
|
V/µs |
IS |
Supply Current |
VCM = 2.1 V |
|
555 |
845 |
uA |
VCM = 2.1 V, –40°C ≤ TJ ≤ 125°C |
|
|
1123 |
VCM = –2 V |
|
2200 |
2900 |
CM = –2 V, –40°C ≤ TJ ≤ 125°C |
|
|
3110 |
VOUT |
Maximum Output Voltage |
VCM = 12 V, RG= 500 kΩ, |
10 |
|
|
V |
Minimum Output Voltage |
VCM = 2.1 V |
|
|
24 |
mV |
IOUT |
Output current(8) |
Sourcing, VOUT= 5.25 V, RG = 150 kΩ |
|
5 |
|
mA |
CLOAD |
Max Output Capacitance Load(8) |
|
|
30 |
|
pF |
(2) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJ(MAX), θJA, and the ambient temperature, TA. The maximum allowable power dissipation PDMAX = (TJ(MAX) - TA)/ θJA or the number given in Absolute Maximum Ratings, whichever is lower.
(3) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No assurance of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA.
(4) Typical values represent the most likely parametric norm at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not specified on shipped production material.
(5) All limits are specified by testing, design, or statistical analysis.
(6) Offset voltage temperature drift is determined by dividing the change in VOS at the temperature extremes by the total temperature change.
(7) The number specified is the average of rising and falling slew rates and measured at 90% to 10%.
(8) This parameter is specified by design and/or characterization and is not tested in production.
(9) Positive Bias Current corresponds to current flowing into the device.