7.1 Overview

The following operating description of the LMR10520 refers to Functional Block Diagram and to the waveforms in Figure 13. The LMR10520 supplies a regulated output voltage by switching the internal PMOS control switch at constant frequency and variable duty cycle. A switching cycle begins at the falling edge of the reset pulse generated by the internal oscillator. When this pulse goes low, the output control logic turns on the internal PMOS control switch. During this on-time, the SW pin voltage (V_SW) swings up to approximately V_IN, and the inductor current (I_L) increases with a linear slope. I_L is measured by the current sense amplifier, which generates an output proportional to the switch current. The sense signal is summed with the regulator’s corrective ramp and compared to the error amplifier’s output, which is proportional to the difference between the feedback voltage and V_REF. When the PWM comparator output goes high, the output switch turns off until the next switching cycle begins. During the switch off-time, inductor current discharges through the Schottky catch diode, which forces the SW pin to swing below ground by the forward voltage (V_D) of the Schottky catch diode. The regulator loop adjusts the duty cycle (D) to maintain a constant output voltage.

Figure 13. Typical Waveforms