10.1 Layout Guidelines

Layout is a critical portion of good power supply design. The following guidelines will help users design a PCB with the best power conversion performance, thermal performance, and minimized generation of unwanted EMI.

1. The feedback network, resistor R_FBT and R_FBB, should be kept close to the FB pin. V_OUT sense path away from noisy nodes and preferably through a layer on the other side of a shielding layer .
2. The input bypass capacitor C_IN must be placed as close as possible to the VIN pin and ground. Grounding for both the input and output capacitors should consist of localized top side planes that connect to the GND pin and PAD .
3. The inductor L should be placed close to the SW pin to reduce magnetic and electrostatic noise.
4. The output capacitor, C_OUT should be placed close to the junction of L and the diode D. The L, D, and C_OUT trace should be as short as possible to reduce conducted and radiated noise and increase overall efficiency.
5. The ground connection for the diode, C_IN, and C_OUT should be as small as possible and tied to the system ground plane in only one spot (preferably at the C_OUT ground point) to minimize conducted noise in the system ground plane
6. For more detail on switching power supply layout considerations see SNVA021 Application Note AN-1149

10.2 Layout Example

Figure 31. Layout