ZHCSDV3 June 2015 LMR16006Y-Q1
PRODUCTION DATA.
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NUMBER | ||
CB | 1 | I | Switch FET gate bias voltage. Connect Cboot capacitor between CB and SW. |
GND | 2 | G | Ground connection. |
FB | 3 | I | Feedback Input. Set feedback voltage divider ratio with VOUT = VFB (1 + (R1/R2)). |
SHDN | 4 | I | Enable and disable input (high voltage tolerant). Internal pull-up current source. Pull below 1.25 V to disable. Float to enable. Establish input undervoltage lockout with two resistor divider. |
VIN | 5 | I | Power input voltage pin. Input for internal supply and drain node input for internal high-side MOSFET. |
SW | 6 | O | Switch node. Connect to inductor, diode, and Cboot capacitor. |