ZHCSIE8C June   2018  – October 2020 LMR33630-Q1

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Characteristics
    7. 6.7 System Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power-Good Flag Output
      2. 7.3.2 Enable and Start-up
      3. 7.3.3 Current Limit and Short Circuit
      4. 7.3.4 Undervoltage Lockout and Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Auto Mode
      2. 7.4.2 Dropout
      3. 7.4.3 Minimum Switch On-Time
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  Choosing the Switching Frequency
        3. 8.2.2.3  Setting the Output Voltage
        4. 8.2.2.4  Inductor Selection
        5. 8.2.2.5  Output Capacitor Selection
        6. 8.2.2.6  Input Capacitor Selection
        7. 8.2.2.7  CBOOT
        8. 8.2.2.8  VCC
        9. 8.2.2.9  CFF Selection
        10. 8.2.2.10 External UVLO
        11. 8.2.2.11 Maximum Ambient Temperature
      3. 8.2.3 Application Curves
    3. 8.3 What to Do and What Not to Do
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Ground and Thermal Considerations
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 支持资源
    4. 11.4 接收文档更新通知
    5. 11.5 Trademarks
    6. 11.6 静电放电警告
    7. 11.7 术语表

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • RNX|12
散热焊盘机械数据 (封装 | 引脚)
订购信息

6.5 Electrical Characteristics

Limits apply over the operating junction temperature (TJ) range of –40°C to +125°C, unless otherwise stated. Minimum and maximum limits are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated, the following conditions apply: VIN  = 12 V, VEN = 4 V.     
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE
VIN Minimum operating input voltage 3.8 V
IQ Non-switching input current; measured at VIN pin (2) VFB = 1.2 V 24 34 µA
ISD Shutdown quiescent current; measured at VIN pin EN = 0 5 10 µA
ENABLE
VEN-VCC-H EN input level required to turn on internal LDO Rising threshold 1 V
VEN-VCC-L EN input level required to turn off internal LDO Falling threshold 0.3 V
VEN-H EN input level required to start switching Rising threshold 1.2 1.231 1.26 V
VEN-HYS Hysteresis below VEN-H Hysteresis below VEN-H; falling 100 mV
ILKG-EN Enable input leakage current VEN = 3.3 V 0.2 nA
INTERNAL SUPPLIES
VCC Internal LDO output voltage appearing at the VCC pin 6 V ≤ VIN ≤ 36 V 4.75 5 5.25 V
VBOOT-UVLO Bootstrap voltage undervoltage lock-out threshold(3) 2.2 V
VOLTAGE REFERENCE (FB PIN)
VFB Feedback voltage; ADJ option 0.985 1 1.015 V
IFB Current into FB pin; ADJ option FB = 1 V 0.2 50 nA
CURRENT LIMITS(4)
ISC High-side current limit LMR33630 3.85 4.5 5.05 A
ILIMIT Low-side current limit LMR33630 2.9 3.5 4.1 A
IPEAK-MIN Minimum peak inductor current LMR33630 0.69 A
IZC Zero current detector threshold -0.106 A
SOFT START
tSS Internal soft-start time 2.9 4 6 ms
POWER GOOD (PG PIN)
VPG-HIGH-UP Power-good upper threshold - rising % of FB voltage 105% 107% 110%
VPG-HIGH-DN Power-good upper threshold - falling % of FB voltage 103% 105% 108%
VPG-LOW-UP Power-good lower threshold - rising % of FB voltage 92% 94% 97%
VPG-LOW-DN Power-good lower threshold - falling % of FB voltage 90% 92% 95%
tPG Power-good glitch filter delay(1) 60 170 µs
RPG Power-good flag RDSON VIN = 12 V, VEN = 4 V 76 150 Ω
VEN = 0 V 35 60
VIN-PG Minimum input voltage for proper PG function 50-µA, EN = 0 V 2 V
VPG PG logic low output 50-µA, EN = 0 V, VIN = 2V 0.2 V
OSCILLATOR
ƒSW Switching frequency "A" Version 340 400 460 kHz
ƒSW Switching frequency "B" Version 1.2 1.4 1.6 MHz
ƒSW Switching frequency "C" Version, RNX package 1.8 2.1 2.3 MHz
MOSFETS
RDS-ON-HS High-side MOSFET ON-resistance RNX package 75 145 mΩ
RDS-ON-LS Low-side MOSFET ON-resistance RNX package 50 95 mΩ
(1) See Power-Good Flag Output for details.
(2) This is the current used by the device open loop. It does not represent the total input current of the system when in regulation.
(3) When the voltage across the CBOOT capacitor falls below this voltage, the low side MOSFET is turned on to recharge CBOOT.
(4) The current limit values in this table are tested, open loop, in production. They may differ from those found in a closed loop application.
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