SNVSCH7 February 2024 LMR38025
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
SUPPLY VOLTAGE AND CURRENT | ||||||
VIN_OPERATE | Input operating voltage | Needed to start up | 4.2 | V | ||
Once operating | 3.8 | V | ||||
IQ-NON_SW | Non-switching operating quiescent current | VEN = 3.3V (PFM variant only) | 40 | µA | ||
ISD | Shutdown quiescent current; measured at VIN pin | VEN = 0V | 3 | 8 | µA | |
ENABLE | ||||||
VEN-H | Enable input high level | VENABLE rising | 1.1 | 1.25 | 1.4 | V |
VEN-L | Enable input low level | VENABLE falling | 0.95 | 1.10 | 1.22 | V |
ILKG-EN | Enable input leakage current | VEN = 3.3V | 5.0 | nA | ||
VOLTAGE REFERENCE (FB PIN) | ||||||
VREF | Feedback reference voltage | VIN = 4.2V to 80V, TJ = 25°C, FPWM | 0.99 | 1 | 1.01 | V |
VREF | Feedback reference voltage | FPWM | 0.985 | 1 | 1.015 | V |
ILKG-FB | Feedback leakage current | FB = 1.2V (adjustable option) | 2.1 | nA | ||
CURRENT LIMITS AND HICCUP | ||||||
ISC-LIMIT | High-side current limit(2) | 3.18 | 3.9 | 4.64 | A | |
ILS-LIMIT | Low-side current limit(2) | 2.25 | 2.85 | 3.5 | A | |
IL-ZC | Zero cross detector threshold | PFM variants only | 0.07 | A | ||
IPEAK-MIN | Minimum inductor peak current(2) | PFM variants only | 0.6 | A | ||
IL-NEG | Negative current limit(2) | FPWM variant only | –1.1 | A | ||
POWER STAGE | ||||||
RDS-ON-HS | High-side MOSFET on-resistance | 303 | mΩ | |||
RDS-ON-LS | Low-side MOSFET on-resistance | 133 | mΩ | |||
tON-MIN | Minimum switch on-time | VIN = 24V, Iout = 1A | 80 | 131 | ns | |
tOFF-MIN | Minimum switch off-time | 190 | 300 | ns | ||
tON-MAX | Maximum switch on-time | 5 | us | |||
SWITCHING FREQUENCY AND SYNCHRONIZATION | ||||||
FOSC | Switching frequency | RT = 49.9kΩ | 430 | 525 | 650 | kHz |
FSPREAD | Spread of internal oscillator with spread spectrum enabled |
–8% | 8% | |||
VSYNC_HI | SYNC clock high level threshold | 2 | V | |||
VSYNC_LO | SYNC clock low level threshold | 0.6 | V | |||
tPULSE_H | High duration needed to be recognized as a pulse | 50 | ns | |||
CLOCK | Time needed for clock to lock to a valid synchronization signal in sync cycles | 230 | us | |||
STARTUP AND TRACKING | ||||||
tSS | Internal soft-start time | 4.2 | ms | |||
POWER GOOD | ||||||
VPG-HIGH-UP | Power-Good upper threshold - rising | % of FB voltage | 110% | 112% | 114% | |
VPG-LOW-DN | Power-Good lower threshold - falling | % of FB voltage | 90% | 92% | 94% | |
VPG-HYS | Power-Good hysteresis (rising and falling) | % of FB voltage | 2.2% | |||
VPG-VALID | Minimum input voltage for proper Power-Good function | 2 | V | |||
RPG | Power-Good on-resistance | VEN = 0V | 140 | Ω | ||
RPG | Power-Good on-resistance | VEN = 3.3V | 92 | Ω | ||
tPGDFLT(fall) | Glitch filter time constant for PGOOD function | 45 | us | |||
THERMAL SHUTDOWN | ||||||
TSD-Rising(3) | Thermal shutdown | Shutdown threshold | 163 | ℃ | ||
TSD-Falling(3) | Thermal shutdown | Recovery threshold | 150 | ℃ |