ZHCSGT2C November   2016  – August 2021 LMS3635-Q1 , LMS3655-Q1

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Device Comparison Tables
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Thermal Information (for Device Mounted on PCB)
    6. 7.6 Electrical Characteristics
    7. 7.7 System Characteristics
    8. 7.8 Timing Requirements
    9. 7.9 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
      1. 8.2.1 Control Scheme
    3. 8.3 Feature Description
      1. 8.3.1 RESET Flag Output
      2. 8.3.2 Enable and Start-Up
      3. 8.3.3 Soft-Start Function
      4. 8.3.4 Current Limit
      5. 8.3.5 Hiccup Mode
      6. 8.3.6 Synchronizing Input
      7. 8.3.7 Undervoltage Lockout (UVLO) and Thermal Shutdown (TSD)
      8. 8.3.8 Input Supply Current
    4. 8.4 Device Functional Modes
      1. 8.4.1 AUTO Mode
      2. 8.4.2 FPWM Mode
      3. 8.4.3 Dropout
      4. 8.4.4 Spread-Spectrum Operation
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 General Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 9.2.1.2.2 External Components Selection
            1. 9.2.1.2.2.1 Input Capacitors
            2. 9.2.1.2.2.2 Output Inductors and Capacitors
              1. 9.2.1.2.2.2.1 Inductor Selection
              2. 9.2.1.2.2.2.2 Output Capacitor Selection
          3. 9.2.1.2.3 Setting the Output Voltage
          4. 9.2.1.2.4 FB for Adjustable Output
          5. 9.2.1.2.5 VCC
          6. 9.2.1.2.6 BIAS
          7. 9.2.1.2.7 CBOOT
          8. 9.2.1.2.8 Maximum Ambient Temperature
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Fixed 5-V Output for USB-Type Applications
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 Fixed 3.3-V Output
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curves
      4. 9.2.4 6-V Adjustable Output
        1. 9.2.4.1 Design Requirements
        2. 9.2.4.2 Detailed Design Procedure
        3. 9.2.4.3 Application Curves
    3. 9.3 Do's and Don't's
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 第三方米6体育平台手机版_好二三四免责声明
      2. 12.1.2 Development Support
        1. 12.1.2.1 Custom Design With WEBENCH® Tools
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 接收文档更新通知
    4. 12.4 支持资源
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 术语表
  13. 13Mechanical, Packaging, and Orderable Information

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机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息
Input Capacitors

The input capacitor supplies the AC switching current drawn from the switching action of the internal power FETs. The input current of a buck converter is discontinuous, so the ripple current supplied by the input capacitor is large. The input capacitor must be rated to handle both the RMS current and the dissipated power.

The device is designed to be used with ceramic capacitors on the input of the buck regulator. The recommended dielectric type of these capacitors is X7R rating to maintain proper tolerances over voltage and temperature.

The device requires a minimum of 20 µF of ceramic capacitance at the input. TI recommends 2 × 10 µF, 10 µF for PVIN1 and 10 µF for PVIN2. Place these capacitors close to the PVIN1, PGND1, PVIN2, and the PGND2 pads. The ceramic input capacitors provide a low impedance source to the regulator in addition to supplying ripple current and isolating switching noise from other circuits. Table 9-1 shows the nominal and minimum values of total input capacitance recommended for the LMS36x5-Q1. Also shown are the measured values of effective capacitance for the indicated capacitor.

In addition, it is especially important to have small ceramic bypass capacitors of 10 nF to 100 nF very close to the PVIN1 and PVIN2 inputs to minimize ringing and EMI generation due to the high-speed switching of the device coupled with trace inductance. TI recommends that a small case size 10-nF ceramic capacitor be placed across the input, as close to the device as possible. Additional high-frequency capacitors can be used to help manage conducted EMI or voltage spike issues that may be encountered.

Many times it is desirable to use an additional electrolytic capacitor on the input, in parallel with the ceramics. This is especially true if long leads or traces are used to connect the input supply to the regulator. The moderate ESR of this capacitor can help damp any ringing on the input supply caused by long power leads. The use of this additional capacitor also helps with voltage dips caused by input supplies with unusually high impedance.

Table 9-1 Recommended Input Capacitors
NOMINAL INPUT CAPACITANCEMINIMUM INPUT CAPACITANCEPART NUMBER
RATED CAPACITANCEMEASURED CAPACITANCE(1)RATED CAPACITANCEMEASURED CAPACITANCE(1)
3 × 10 μF22.5 μF2 × 10 μF15 μFCL32B106KBJNNNE
Measured at 14 V and 25°C.