ZHCSGY9B July 2017 – March 2018 LMS3655
PRODUCTION DATA.
It is often desirable to synchronize the operation of multiple regulators in a single system. This technique results in better-defined EMI and can reduce the need for capacitance on some power rails. The LMS3655 provides a SYNC input which allows synchronization with an external clock. The LMS3655 implements an in-phase locking scheme—the rising edge of the clock signal provided to the SYNC input corresponds to turning on the high-side device within the LMS3655. The SYNC mode operation is implemented using phase locking over a limited frequency range eliminating large glitches upon initial application of an external clock. The clock fed into the LMS3655 replaces the internal free running clock but does not affect frequency foldback operation. Output voltage continues to be well regulated with duty factors outside of the normal 4% through 96% range though at reduced frequency.
The SYNC input recognizes a valid high level as that ≥ 1.5 V, and a valid low as that ≤ 0.4 V. The frequency synchronization signal must be in the range of 250 kHz to 500 kHz with a duty cycle of 10% to 90%. The internal clock is synced to the rising edge of the external clock. Ground this input if not used; this input must not be allowed to float. See Device Functional Modes to determine which modes are valid for synchronizing the clock.
The device remains in FPWM mode and operates in CCM for light loads when a synchronization input is provided. To prevent frequency foldback behavior at low duty cycles, provide a 200-mA load.