SNOSC70C April 2012 – July 2016 LMV601 , LMV602 , LMV604
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Electrical Characteristics - DC (2.7 V)
- 6.6 Electrical Characteristics - AC (2.7 V)
- 6.7 Electrical Characteristics - DC (5 V)
- 6.8 Electrical Characteristics - AC (5 V)
- 6.9 Typical Characteristics
- 7 Detailed Description
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)(2)| MIN | MAX | UNIT | |||
|---|---|---|---|---|---|
| Differential input voltage | ±Supply Voltage | ||||
| Supply voltage, (V+) – (V–) | 6 | V | |||
| Output short circuit to V+ | See(3) | ||||
| Output short circuit to V– | See(4) | ||||
| Junction temperature, TJ(5) | 150 | °C | |||
| Storage temperature, Tstg | –65 | 150 | °C | ||
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications.
(3) Shorting output to V+ adversely affects reliability.
(4) Shorting output to V– adversely affects reliability.
(5) The maximum power dissipation is a function of TJ(MAX), RθJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA) / RθJA. All numbers apply for packages soldered directly onto a PCB.
6.2 ESD Ratings
| VALUE | UNIT | |||
|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human-body model (HBM)(1)(1) | ±2000 | V |
| Machine model (MM)(2) | ±200 | |||
(1) Human-Body Model, applicable std. MIL-STD-883, Method 3015.7.
(2) Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC) Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Supply voltage | 2.7 | 5.5 | V | |
| Temperature | –40 | 125 | °C | |
6.4 Thermal Information
| THERMAL METRIC(1) | LMV601 | LMV602 | LMV604 | UNIT | |||
|---|---|---|---|---|---|---|---|
| DCK (SC70) |
D (SOIC) |
DGK (VSSOP) |
D (SOIC) |
PW (TSSOP) |
|||
| 6 PINS | 8 PINS | 8 PINS | 14 PINS | 14 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 229.1 | 120.8 | 178.3 | 91.5 | 123.8 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 116.1 | 65.2 | 68.4 | 49.7 | 50.5 | °C/W |
| RθJB | Junction-to-board thermal resistance | 53.3 | 61.4 | 98.8 | 46 | 66.2 | °C/W |
| ψJT | Junction-to-top characterization parameter | 8.8 | 16.1 | 9.8 | 12.4 | 6.3 | °C/W |
| ψJB | Junction-to-board characterization parameter | 52.7 | 60.8 | 97.3 | 45.7 | 65.6 | °C/W |
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
6.5 Electrical Characteristics – DC (2.7 V)
Unless otherwise specified, all limits ensured for TJ = 25°C, V+ = 2.7 V, V− = 0 V, VCM = V+ / 2, VO = V+ / 2 and RL > 1 MΩ.(1)(1) Values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No assurance of parametric performance is indicated in the electrical tables under conditions of internal self heating where TJ > TA.
6.6 Electrical Characteristics – AC (2.7 V)
Unless otherwise specified, all limits ensured for TJ = 25°C, V+ = 2.7 V, V− = 0 V, VCM = V+ / 2, VO = V+ / 2 and RL > 1 MΩ.(1)| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| SR | Slew rate | RL = 10 kΩ,(2) | 1 | V/µs | ||
| GBW | Gain bandwidth product | RL = 100 kΩ, CL = 200 pF | 1 | MHz | ||
| Φm | Phase margin | RL = 100 kΩ | 72 | deg | ||
| Gm | Gain margin | RL = 100 kΩ | 20 | dB | ||
| en | Input-referred voltage noise | f = 1 kHz | 40 | nV/√Hz | ||
| in | Input-referred current noise | f = 1 kHz | 0.001 | pA/√Hz | ||
| THD | Total harmonic distortion | f = 1 kHz, AV = 1 RL = 600 Ω, VIN = 1 VPP |
0.017% | |||
(1) Values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No assurance of parametric performance is indicated in the electrical tables under conditions of internal self heating where TJ > TA.
(2) Connected as voltage follower with 2-VPP step input. Number specified is the slower of the positive and negative slew rates.
6.7 Electrical Characteristics – DC (5 V)
over operating free-air temperature range (unless otherwise noted)(1)| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
|---|---|---|---|---|---|---|---|
| VOS | Input offset voltage | LMV601 | 0.25 | 4 | mV | ||
| LMV602 and LMV604 | 0.7 | 5 | |||||
| TCVOS | Input offset voltage average drift | 1.9 | µV/°C | ||||
| IB | Input bias current | 0.02 | pA | ||||
| IOS | Input offset current | 6.6 | fA | ||||
| IS | Supply current | Per amplifier | 107 | 200 | µA | ||
| Shutdown mode, VSD = 0 V (LMV601) | 0.033 | 1 | µA | ||||
| CMRR | Common-mode rejection ratio | 0 V ≤ VCM ≤ 4 V | 86 | dB | |||
| PSRR | Power supply rejection ratio | 2.7 V ≤ V+ ≤ 5 V | 82 | dB | |||
| VCM | Input common-mode voltage | For CMRR ≥ 50 dB | 0 | 4 | V | ||
| AV | Large signal voltage gain(2) | RL = 10 kΩ to 2.5 V | 116 | dB | |||
| VO | Output swing | RL = 10 kΩ to 2.5 V | Swing high | 7 | 30 | mV | |
| Swing low | 30 | 7 | |||||
| IO | Output short-circuit current | Sourcing | 113 | mA | |||
| Sinking | 75 | ||||||
| ton | Turnon time from shutdown | (LMV601) | 5 | µs | |||
| VSD | Shutdown pin voltage range | ON mode (LMV601) | 3.1 | 5 | V | ||
| Shutdown mode (LMV601) | 0 | 0.8 | |||||
(1) Values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No assurance of parametric performance is indicated in the electrical tables under conditions of internal self heating where TJ > TA.
(2) RL is connected to mid-supply. The output voltage is GND + 0.2 V ≤ VO ≤ V+ − 0.2 V
6.8 Electrical Characteristics – AC (5 V)
Unless otherwise specified, all limits ensured for TJ = 25°C, V+ = 5 V, V− = 0 V, VCM = V+ / 2, VO = V+ / 2 and RL > 1 MΩ.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| SR | Slew rate | RL = 10 kΩ,(1) | 1 | V/µs | ||
| GBW | Gain bandwidth product | RL = 100 kΩ, CL = 200 pF | 1 | MHz | ||
| Φm | Phase margin | RL = 100 kΩ | 72 | ° | ||
| Gm | Gain margin | RL = 100 kΩ | 20 | dB | ||
| en | Input-referred voltage noise | f = 1 kHz | 39 | nV/√Hz | ||
| in | Input-referred current noise | f = 1 kHz | 0.001 | pA/√Hz | ||
| THD | Total harmonic distortion | f = 1 kHz, AV = 1 RL = 600 Ω, VIN = 1 VPP |
0.012% | |||
(1) Connected as voltage follower with 2-VPP step input. Number specified is the slower of the positive and negative slew rates.
6.9 Typical Characteristics
Figure 1. Supply Current vs Supply Voltage (LMV601)
Figure 3. Output Voltage Swing vs Supply Voltage
Figure 5. ISOURCE vs VOUT
Figure 7. ISINK vs VOUT
Figure 9. VOS vs VCM
Figure 11. VIN vs VOUT
Figure 13. CMRR vs Frequency
Figure 15. Input Voltage Noise vs Frequency
Figure 17. Slew Rate vs Temperature
Figure 19. THD+N vs Frequency
Figure 21. Open-Loop Frequency Over Temperature
Figure 23. Open-Loop Frequency Response
Figure 25. Gain and Phase vs CL
Figure 27. Stability vs Capacitive Load
Figure 29. Noninverting Large Signal Pulse Response
Figure 31. Noninverting Large Signal Pulse Response
Figure 33. Noninverting Large Signal Pulse Response
Figure 35. Inverting Large Signal Pulse Response
Figure 37. Inverting Large Signal Pulse Response
Figure 39. Inverting Large Signal Pulse Response
Figure 2. Input Current vs Temperature
Figure 4. Output Voltage Swing vs Supply Voltage
Figure 6. ISOURCE vs VOUT
Figure 8. ISINK vs VOUT
Figure 10. VOS vs VCM
Figure 12. VIN vs VOUT
Figure 14. PSRR vs Frequency
Figure 16. Slew Rate vs VSUPPLY
Figure 18. Slew Rate vs Temperature
Figure 20. THD+N vs VOUT
Figure 22. Open-Loop Frequency Response
Figure 24. Gain and Phase vs CL
Figure 26. Stability vs Capacitive Load
Figure 28. Noninverting Small Signal Pulse Response
Figure 30. Noninverting Small Signal Pulse Response
Figure 32. Noninverting Small Signal Pulse Response
Figure 34. Inverting Small Signal Pulse Response
Figure 36. Inverting Small Signal Pulse Response
Figure 38. Inverting Small Signal Pulse Response
Figure 40. Crosstalk Rejection vs Frequency