ZHCSEK3G December 2015 – August 2022 LMX2592
PRODUCTION DATA
- 1 特性
- 2 应用
- 3 说明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Detailed Description
-
8 Application and Implementation
- 8.1
Application Information
- 8.1.1 Optimization of Spurs
- 8.1.2 Configuring the Input Signal Path
- 8.1.3 Input Pin Configuration
- 8.1.4 Using the OSCin Doubler
- 8.1.5 Using the Input Signal Path Components
- 8.1.6 Designing for Output Power
- 8.1.7 Current Consumption Management
- 8.1.8 Decreasing Lock Time
- 8.1.9 Modeling and Understanding PLL FOM and Flicker Noise
- 8.1.10 External Loop Filter
- 8.2 Typical Application
- 8.3 Power Supply Recommendations
- 8.4 Layout
- 8.1
Application Information
- 9 Device and Documentation Support
- 10Mechanical, Packaging, and Orderable Information
封装选项
请参考 PDF 数据表获取器件具体的封装图。
机械数据 (封装 | 引脚)
- RHA|40
散热焊盘机械数据 (封装 | 引脚)
- RHA|40
订购信息
8.1.1.1 Understanding Spurs by Offsets
The first step in optimizing spurs is to be able to identify them by offset. Figure 8-1 gives a good example that can be used to isolate the following spur types.
Figure 8-1 Spur Offset Frequency ExampleBased on Figure 8-1, the most common spurs can be calculated from the frequencies. Note that the % is the modulus operator and is meant to mean the difference to the closest integer multiple. Some examples of how to use this operator are: 36 % 11 = 3, 1000.1 % 50 = 0.1, and 5023.7 % 122.88 = 14.38. Applying this concept, the spurs at various offsets can be identified from Figure 8-1.
| SPUR TYPE | OFFSET | OFFSET IN Figure 8-1 | COMMENTS | |
|---|---|---|---|---|
| OSCin | fOSC | 40 MHz | This spur occurs at harmonics of the OSCin frequency. | |
| Fpd | fPD | 120 MHz | The phase detector spur has many possible mechanisms and occurs at multiples of the phase detector frequency. | |
| fOUT % fOSC | fOUT % fOSC | 606.25 % 40 = 6.25 MHz | This spur is caused by mixing between the output and input frequencies. | |
| fVCO% fOSC | fVCO % fOSC | 4850 % 40 = 10 MHz | This spur is caused by mixing between the VCO and input frequencies. | |
| fVCO% fPD | fVCO % fPD | 4850 % 120 = 50 MHz | This spur would be the same offset as the integer boundary spur if PLL_N_PRE=1, but can be different if this value is greater than one. | |
| Integer Boundary | fPD *(Fnum%Fden)/ Fden) | 120 × (5%24)/24 = 25 MHz | This is a single spur | |
| Primary Fractional | fPD / Fden | 120 / 24 = 5 MHz | The primary fractional | |
| Sub-Fractional | fPD / Fden / k k=2,3, or 6 | First Order Modulator: None 2nd Order Modulator: 120/24/2 = 2.5 MHz 3rd Order Modulator: 120/24/6 = 0.83333 MHz 4th Order Modulator: 120/24/12 = 0.416666 MHz | To Calculate k: 1st Order Modulator: k=1 2nd Order Modulator: k=1 if Fden is odd, k=2 if Fden is even 3rd Order Modulator: k=1 if Fden not divisible by 2 or 3, k=2 if Fden divisible by 2 not 3, k=3 if Fden divisible by 3 but not 2, Fden = 6 if Fden divisible by 2 and 3 4th Order Modulator: k=1 if Fden not divisible by 2 or 3. k=3 if Fden divisible by 3 but not 2, k=4 if Fden divisible by 2 but not 3, k=12 if Fden divisible by 2 and 3 Sub-Fractional Spurs exist if k>1 | |
In the case that two different spur types occur at the same offset, either name would be correct. Some may name this by the more dominant cause, while others would simply name by choosing the name that is near the top of Table 8-1.