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ZHCSEK3G December 2015 – August 2022 LMX2592

PRODUCTION DATA

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请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)

RHA|40

散热焊盘机械数据 (封装 | 引脚)

RHA|40
- QFND114P

订购信息

8.1.1.2 Spur Mitigation Techniques

Once the spur is identified and understood, there will likely be a desire to try to minimize them. 8-2 gives some common methods.

Table 8-2 Spurs and Mitigation Techniques

SPUR TYPE	WAYS TO REDUCE	TRADE-OFF
OSCin	Use PLL_N_PRE = 2 Use an OSCin signal with low amplitude and high slew rate (like LVDS).
Phase Detector	Decrease PFD_DLY To pin 11, use a series ferrite bead and a shunt 0.1-µF capacitor.
f_OUT % f_OSC	Use an OSCin signal with low amplitude and high slew rate (like LVDS)
f_VCO% f_OSC	To pin 7, use a series ferrite bead and a shunt 0.1-µF capacitor. Increase the offset of this spur by shifting the VCO frequency If multiple VCO frequencies are possible that yield the same spur offset, choose the higher VCO frequency. .
f_VCO% f_PD	Avoid this spur by shifting the phase detector frequency (with the programmable input multiplier or R divider) or shifting the VCO frequency. This spur is better at higher VCO frequency.
Integer Boundary	Methods for PLL Dominated Spurs Avoid the worst case VCO frequencies if possible. Strategically choose which VCO core to use if possible. Ensure good slew rate and signal integrity at the OSCin pin Reduce the loop bandwidth or add more filter poles for out of band spurs Experiment with modulator order and PFD_DLY	Reducing the loop bandwidth may degrade the total integrated noise if the bandwidth is too narrow.
Integer Boundary	Methods for VCO Dominated Spurs Avoid the worst case VCO frequencies if possible. Reduce Phase Detector Frequency Ensure good slew rate and signal integrity at the OSCin pin Make the impedance looking outwards from the OSCin pin close to 50 Ω.	Reducing the phase detector may degrade the phase noise and also reduce the capacitance at the Vtune pin.
Primary Fractional	Decrease Loop Bandwidth Change Modulator Order Use Larger Unequivalent Fractions	Decreasing the loop bandwidth too much may degrade in-band phase noise. Also, larger unequivalent fractions only sometimes work
Sub-Fractional	Use Dithering Use MASH seed Use Larger Equivalent Fractions Use Larger Unequivalent Fractions Reduce Modulator Order Eliminate factors of 2 or 3 in denominator (see AN-1879 Fractional N Frequency Synthesis (SNAA062)	Dithering and larger fractions may increase phase noise. MASH_SEED can be set between values 0 and Fden, which changes the sub-fractional spur behavior. This is a deterministic relationship and there will be one seed value that will give best result for this spur.