ZHCSIC4C June 2018 – November 2018 LMX2615-SP
PRODUCTION DATA.
The LMX2615 is a high-performance, wideband frequency synthesizer with integrated VCO and output divider. The VCO operates from 7600 to 15200 MHz and this can be combined with the output divider to produce any frequency in the range of 40 MHz to 15.2 GHz. Within the input path there are two dividers .
The PLL is fractional-N PLL with programmable delta-sigma modulator up to 4th order. The fractional denominator is a programmable 32-bit long, which can provide fine frequency steps easily below 1-Hz resolution as well as be used to do exact fractions like 1/3, 7/1000, and many others.
For applications where deterministic or adjustable phase is desired, the SYNC pin can be used to get the phase relationship between the OSCin and RFout pins deterministic. Once this is done, the phase can be adjusted in very fine steps of the VCO period divided by the fractional denominator.
The ultra-fast VCO calibration is ideal for applications where the frequency must be swept or abruptly changed. The frequency can be manually programmed.
The JESD204B support includes using the RFoutB output to create a differential SYSREF output that can be either a single pulse or a series of pulses that occur at a programmable distance away from the rising edges of the output signal.
The LMX2615 device requires only a single 3.3 V power supply. The internal power supplies are provided by integrated LDOs, eliminating the need for high performance external LDOs.
Table 1 shows the range of several of the doubler, dividers, and fractional settings.
| PARAMETER | MIN | MAX | COMMENTS |
|---|---|---|---|
| Outputs enabled | 0 | 2 | |
| OSCin doubler | 0 (1X) | 1 (2X) | The low noise doubler can be used to increase the phase detector frequency to improve phase noise and avoid spurs. This is in reference to the OSC_2X bit. |
| Pre-R divider | 1 (bypass) | 128 | Only use the Pre R divider if the input frequency is too high for the Post R divider. |
| Post-R divider | 1 (bypass) | 255 | The maximum input frequency for the post-R divider is 250 MHz. Use the Pre R divider if necessary. |
| N divider | ≥ 28 | 524287 | The minimum divide depends on modulator order and VCO frequency. See N Divider and Fractional Circuitry for more details. |
| Fractional numerator/ denominator | 1 (Integer mode) | 232 – 1 = 4294967295 | The fractional denominator is programmable and can assume any value between 1 and 232–1; it is not a fixed denominator. |
| Fractional order | 0 | 4 | Order 0 is integer mode and the order can be programmed |
| Channel divider | 1 (bypass) | 192 | This is the series of several dividers. Also, be aware that above 10 GHz, the maximum allowable channel divider value is 6. |
| Output frequency | 40 MHz | 15 GHz | This is implied by the minimum VCO frequency divided by the maximum channel divider value. |