ZHCSO17C November 2019 – March 2022 LMX2694-SEP
PRODUCTION DATA
The LMX2694-SEP is programmed using 24-bit shift registers. The shift register consists of a R/W bit (MSB), followed by a 7-bit address field and a 16-bit data field. For the R/W bit, 0 is for write, and 1 is for read. The address field ADDRESS[6:0] is used to decode the internal register address. The remaining 16 bits form the data field DATA[15:0]. While CS# is low, serial data is clocked into the shift register upon the rising edge of clock (data is programmed MSB first). When CS# goes high, data is transferred from the data field into the selected register bank. See Figure 6-2 for timing details.