The LMZ10501 is designed for use with low ESR multi-layer ceramic capacitors (MLCC) for its input and output filters. Using a 10 µF 0603 or 0805 with 6.3V or 10V rating ceramic input capacitor typically provides sufficient V_IN bypass. Use of multiple 4.7 µF or 2.2 µF capacitors can also be considered. Ceramic capacitors with X5R and X7R temperature characteristics are recommended for both input and output filters. These provide an optimal balance between small size, cost, reliability, and performance for space sensitive applications.

The DC voltage bias characteristics of the capacitors must be considered when selecting the DC voltage rating and case size of these components. The effective capacitance of an MLCC is typically reduced by the DC voltage bias applied across its terminals. For example, a typical 0805 case size X5R 6.3 V 10 µF ceramic capacitor can only have 4.8 µF left in it when a 5.0-V DC bias is applied. Similarly, a typical 0603 case size X5R 6.3V 10 µF ceramic capacitor can only have 2.4 µF at the same 5.0V DC. Smaller case size capacitors can have even larger percentage drop in value with DC bias.

The optimum output capacitance value is application dependent. Too small output capacitance can lead to instability due to lower loop phase margin. On the other hand, if the output capacitor is too large, it can prevent the output voltage from reaching the 0.375 V required voltage level at the end of the startup sequence. In such cases, the output short circuit protection can be engaged and the nano module will enter a hiccup mode as described in the Section 7.3.3 section. Table 8-1 sets the minimum output capacitance for stability and maximum output capacitance for proper startup for various output voltage settings. Note that the maximum C_OUT value in Table 8-1 assumes that the filter capacitance on V_CON is the maximum recommended value of 1nF and the R_T resistor value is less than 300kΩ. Lower V_CON capacitance can extend the maximum C_OUT range. There is no great performance benefit in using excessive C_OUT values.

Use of multiple 4.7-µF or 2.2-µF output capacitors can be considered for reduced effective ESR and smaller output voltage ripple. In addition to the main output capacitor, small 0.1-µF – 0.01-µF parallel capacitors can be used to reduce high frequency noise.