ZHCS572H May   2011  – October 2023 LMZ10501

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 System Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Current Limit
      2. 7.3.2 Startup Behavior and Soft Start
      3. 7.3.3 Output Short Circuit Protection
      4. 7.3.4 Thermal Overload Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Circuit Operation
      2. 7.4.2 Input Under Voltage Detection
      3. 7.4.3 Shutdown Mode
      4. 7.4.4 EN Pin Operation
      5. 7.4.5 Internal Synchronous Rectification
      6. 7.4.6 High Duty Cycle Operation
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Setting The Output Voltage
          1. 8.2.2.2.1 RT And RB Selection For Fixed VOUT
          2. 8.2.2.2.2 Output Voltage Accuracy Optimization
        3. 8.2.2.3 Dynamic Output Voltage Scaling
        4. 8.2.2.4 Integrated Inductor
        5. 8.2.2.5 Input And Output Capacitor Selection
      3. 8.2.3 Application Curves
        1. 8.2.3.1 VOUT = 1.2 V
        2. 8.2.3.2 VOUT = 1.8 V
        3. 8.2.3.3 VOUT = 2.5 V
        4. 8.2.3.4 VOUT = 3.3 V
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Voltage Range
      2. 8.3.2 Current Capability
      3. 8.3.3 Input Connection
        1. 8.3.3.1 Voltage Drops
        2. 8.3.3.2 Stability
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
      3. 8.4.3 Package Considerations
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Custom Design With WEBENCH® Tools
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 接收文档更新通知
    4. 9.4 支持资源
    5. 9.5 Trademarks
    6. 9.6 静电放电警告
    7. 9.7 术语表
  11. 10Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • SIL|8
散热焊盘机械数据 (封装 | 引脚)
订购信息

8.3.3.2 Stability

The added inductance of long input cables together with the ceramic (and low ESR) input capacitor can result in an under damped RLC network at the input of the Buck converter. This can cause oscillations on the input and instability. If long wires are used, it is recommended to add some electrolytic capacitance in parallel with the ceramic input capacitor. The electrolytic capacitor's ESR will improve the damping.

Use an electrolytic capacitor with CELECTROLYTIC≥ 4 × CCERAMIC and ESRELECTROLYTIC≈ √ (LCABLE / CCERAMIC)

For example, two cables (one for VIN and one for GND), each 1 meter (~3 ft) long with ~1 mm diameter (18AWG), placed 1cm (~0.4 in) apart will form a rectangular loop resulting in about 1.2µH of inductance. The inductance in this example can be decreased to almost half if the input wires are twisted. Based on a 10µF ceramic input capacitor, the recommended parallel CELECTROLYTIC is ≥ 40 µF. Using a 47-µF capacitor will be sufficient. The recommended ESRELECTROLYTIC≈ 0.35Ω or larger, based on about 1.2 µH of inductance and 10 µF of ceramic input capacitance.

See application note SNVA489 for more details on input filter design.
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