SNVS663H June   2010  – August 2015 LMZ12003EXT

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Ratings
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 COT Control Circuit Overview
      2. 7.3.2 Output Overvoltage Comparator
      3. 7.3.3 Current Limit
      4. 7.3.4 Thermal Protection
      5. 7.3.5 Zero Coil Current Detection
      6. 7.3.6 Prebiased Start-up
    4. 7.4 Device Functional Modes
      1. 7.4.1 Discontinuous Conduction and Continuous Conduction Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Enable Divider, RENT and RENB Selection
        2. 8.2.2.2 Output Voltage Selection
        3. 8.2.2.3 Soft-Start Capacitor Selection
        4. 8.2.2.4 CO Selection
        5. 8.2.2.5 CIN Selection
        6. 8.2.2.6 RON Resistor selection
          1. 8.2.2.6.1 Discontinuous Conduction and Continuous Conduction Modes Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 Power Dissipation and Thermal Considerations
    4. 10.4 Power Module SMT Guidelines
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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6 Specifications

6.1 Absolute Maximum Ratings(1)

MIN MAX UNIT
VIN, RON to GND –0.3 25 V
EN, FB, SS to GND –0.3 7 V
Junction Temperature 150 °C
Peak Reflow Case Temperature (30 sec) 245 °C
Storage Temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)(2) ±2000 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin. Test method is per JESD-22-114.

6.3 Recommended Operating Ratings

MIN MAX UNIT
VIN 4.5 20 V
EN 0 6.5 V
Operation Junction Temperature −55 125 °C

6.4 Thermal Information

THERMAL METRIC(1) LMZ12003EXT UNIT
NDW
7 PINS
RθJA(2) Junction-to-ambient thermal resistance 4-layer JEDEC Printed-Circuit-Board, 100 vias, No air flow 19.3 °C/W
2-layer JEDEC Printed-Circuit-Board, No air flow 21.5
RθJC(top) Junction-to-case (top) thermal resistance No air flow 1.9 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
(2) RθJA measured on a 1.705-in × 3.0-in 4-layer board, with one ounce copper, thirty five thermal vias, no air flow, and 1-W power dissipation. Refer to PCB layout diagrams.

6.5 Electrical Characteristics

Limits in standard type are for TJ = 25°C unless otherwise specified. Minimum and Maximum limits are ensured through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: VIN = 12 V, VOUT = 1.8 V
PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT
SYSTEM PARAMETERS
ENABLE CONTROL
VEN EN threshold trip point VEN rising 1.18 V
over the junction temperature (TJ) range of –55°C to +125°C 1.1 1.26
VEN-HYS EN threshold hysteresis VEN falling 90 mV
SOFT-START
ISS SS source current VSS = 0 V 8 µA
over the junction temperature (TJ) range of –55°C to +125°C 4.9 11
ISS-DIS SS discharge current –200 µA
CURRENT LIMIT
ICL Current limit threshold DC average
VIN= 12 V to 20 V		 4.2 A
over the junction temperature (TJ) range of –55°C to +125°C 3.15 5.3
ON/OFF TIMER
tON-MIN ON timer minimum pulse width 150 ns
tOFF OFF timer pulse width 260 ns
REGULATION AND OVERVOLTAGE COMPARATOR
VFB In-regulation feedback voltage VSS >+ 0.8 V
TJ = –55°C to 125°C
IO = 3 A		 0.793 V
over the junction temperature (TJ) range of –55°C to +125°C 0.773 0.813
VSS >+ 0.8 V
TJ = 25°C
IO = 10 mA		 0.784 0.8 0.816 V
VFB-OV Feedback overvoltage protection threshold 0.92 V
IFB Feedback input bias current 5 nA
IQ Non-switching input current VFB= 0.86 V 1 mA
ISD Shutdown quiescent current VEN= 0 V 25 μA
THERMAL CHARACTERISTICS
TSD Thermal shutdown Rising 165 °C
TSD-HYST Thermal shutdown hysteresis Falling 15 °C
PERFORMANCE PARAMETERS(3)
ΔVO Output voltage ripple 8 mVPP
ΔVO/ΔVIN Line regulation VIN = 8 V to 20 V, IO= 3 A 0.01%
ΔVO/ΔVIN Load regulation VIN = 12 V 1.5 mV/A
η Efficiency VIN = 12 V, VO = 1.8 V, IO = 1 A 87%
VIN = 12 V, VO = 1.8 V, IO = 3 A 77%
(1) Minimum and Maximum limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Texas Instruments' Average Outgoing Quality Level (AOQL).
(2) Typical numbers are at 25°C and represent the most likely parametric normal.
(3) EN 55022:2006, +A1:2007, FCC Part 15 Subpart B: 2007. See AN-2024 SNVA422 and layout for information on device under test.

6.6 Typical Characteristics

Unless otherwise specified, the following conditions apply: VIN = 12 V; CIN = 10-µF X7R Ceramic; CO = 100-µF X7R Ceramic; TA = 25°C for efficiency curves and waveforms.
LMZ12003EXT 30117521.png
Figure 1. Efficiency 6-V Input at 25°C
LMZ12003EXT 30117503.gif
Figure 3. Efficiency 12-V Input at 25°C
LMZ12003EXT 30117533.gif
Figure 5. Efficiency 6-V Input at 85°C
LMZ12003EXT 30117540.gif
Figure 7. Efficiency 8-V Input at 85°C
LMZ12003EXT 30117542.gif
Figure 9. Efficiency 12-V Input at 85°C
LMZ12003EXT 30117548.gif
Figure 11. Line and Load Regulation at 25°C
LMZ12003EXT 30117557.gif
Figure 13. Line and Load Regulation at –55°C
LMZ12003EXT 30117506.png
12 VIN 3.3 VO 0.6-A to 3-A Step
Figure 15. Transient Response
LMZ12003EXT 30117558.gif
Figure 17. Current Limit 1.8 VOUT at 25°C
LMZ12003EXT 30117559.gif
Figure 19. Current Limit 1.8 VOUT at 85°C
LMZ12003EXT 30117522.png
Figure 2. Dissipation 6-V Input at 25°C
LMZ12003EXT 30117504.gif
Figure 4. Dissipation 12-V Input at 25°C
LMZ12003EXT 30117534.gif
Figure 6. Dissipation 6-V Input at 85°C
LMZ12003EXT 30117541.gif
Figure 8. Dissipation 8-V Input at 85°C
LMZ12003EXT 30117543.gif
Figure 10. Dissipation 12-V Input at 85°C
LMZ12003EXT 30117556.gif
Figure 12. Line and Load Regulation at 85°C
LMZ12003EXT 30117505.png
12 VIN 3.3 VO 3 A 20 mV/div 1 μS/div
Figure 14. Output Ripple
LMZ12003EXT 30117551.gif
Figure 16. Thermal Derating
LMZ12003EXT 30117560.gif
Figure 18. Current Limit 1.8 VOUT –55°C
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