Table 1. Design Parameters

9.2.1.2.1 Output Capacitor Requirements

A 1-µF (or greater) capacitor is required between the output and ground for stability at output voltages of 5 V or higher. At lower output voltages, more capacitance is required (2.2 µF or more is recommended for 3-V and
3.3-V versions). Without this capacitor the device oscillates. Most types of tantalum or aluminum electrolytic work fine here; even film types work but are not recommended for reasons of cost. Many aluminum electrolytics have electrolytes that freeze at about −30°C, so solid tantalums are recommended for operation below −25°C. The important parameters of the capacitor are an ESR of about 5 Ω or less and a resonant frequency above 500 kHz. The value of this capacitor may be increased without limit.

Figure 37. Output Capacitor ESR Range

The reason for the lower ESR limit is that the loop compensation of the feedback loop relies on the capacitance value and the ESR value of the output capacitor to provide the zero that gives added phase lead (See Figure 37).

Using the 2.2 µF value from the Output Capacitor ESR Range curve (Figure 37), a useful range for f_Z can be estimated:

For ceramic capacitors, the low ESR produces a zero at a frequency that is too high to be useful, so meaningful phase lead does not occur. A ceramic output capacitor can be used if a series resistance is added (recommended value of resistance about 0.1 Ω to 2 Ω) to simulate the needed ESR. Only X5R, X7R, or better, MLCC types should be used, and should have a DC voltage rating at least twice the V_OUT(NOM) value.

At lower values of output current, less output capacitance is required for stability. The capacitor can be reduced to 0.33 µF for currents below 10 mA or 0.1 µF for currents below 1 mA. Using the adjustable versions at voltages below 5 V runs the error amplifier at lower gains so that more output capacitance is needed. For the worst-case situation of a 100-mA load at 1.23 V output (output shorted to Feedback) a 3.3-µF (or greater) capacitor should be used.

Unlike many other regulators, the LP2950-N remains stable and in regulation with no load in addition to the internal voltage divider. This is especially important in CMOS RAM keep-alive applications. When setting the output voltage of the LP2951-N versions with external resistors, a minimum load of 1 µA is recommended.

Applications having conditions that may drive the LP2950-N/51 into nonlinear operation require special consideration. Nonlinear operation occurs when the output voltage is held low enough to force the output stage into output current limiting while trying to pull the output voltage up to the regulated value. The internal loop response time controls how long it takes for the device to regain linear operation when the output has returned to the normal operating range. There are three significant nonlinear conditions that need to be considered, all can force the output stage into output current limiting mode, all can cause the output voltage to over-shoot with low value output capacitors when the condition is removed, and the recommended generic solution is to set the output capacitor to a value not less than 10 µF. Although the 10 µF value for C_OUT may not eliminate the output voltage over-shoot in all cases, it should lower it to acceptable levels (< 10% of V_OUT(NOM)) in the majority of cases. In all three of these conditions, applications with lighter load currents are more susceptible to output voltage over-shoot than applications with higher load currents.

1. At power-up, with the input voltage rising faster than output stage can charge the output capacitor.
Equation 4. V_IN t_RISE(MIN) > ((C_OUT / 100 mA) × ΔV_IN)
where
• ΔV_IN = V_OUT(NOM) + 1 V
2. Recovery from an output short circuit to ground condition.
Equation 5. C_OUT(MIN) ≈ (160 mA – I_LOAD(NOM))/((V_OUT(NOM)/10)/25 µs))
3. Toggling the LP2951-N SHUTDOWN pin from high (OFF) to low (ON).
Equation 6. C_OUT(MIN) ≈ (160 mA – I_LOAD(NOM))/((V_OUT(NOM)/10)/25 µs))

Figure 38. LP2951-N Enable Transient

9.2.1.2.2 Input Capacitor Requirements

A minimum 1 µF tantalum, ceramic or aluminum electrolytic capacitor should be placed from the LP2950-N/LP2951-N input pin to ground if there is more than 10 inches of wire between the input and the AC filter capacitor or if a battery is used as the input.

9.2.1.2.3 Error Detection Comparator Output

The comparator produces a logic low output whenever the LP2951-N output falls out of regulation by more than approximately 5%. This figure is the comparator's built-in offset of about 60 mV divided by the 1.235 reference voltage. (Refer to the block diagram in the front of the datasheet.) This trip level remains “5% below normal” regardless of the programmed output voltage of the 2951. For example, the error flag trip level is typically 4.75 V for a 5-V output or 11.4 V for a 12-V output. The out of regulation condition may be due either to low input voltage, current limiting, or thermal limiting.

Figure 39 below gives a timing diagram depicting the ERROR signal and the regulated output voltage as the LP2951-N input is ramped up and down. For 5 V versions, the ERROR signal becomes valid (low) at about 1.3-V input. It goes high at about 5-V input (the input voltage at which V_OUT = 4.75 V). Because the LP2951-N dropout voltage is load-dependent (see curve in typical performance characteristics), the input voltage trip point (about 5 V) varies with the load current. The output voltage trip point (approx. 4.75 V) does not vary with load.

The error comparator has an open-collector output which requires an external pull up resistor. This resistor may be returned to the output or some other supply voltage depending on system requirements. In determining a value for this resistor, note that while the output is rated to sink 400 µA, this sink current adds to battery drain in a low battery condition. Suggested values range from 100 k to 1 MΩ. The resistor is not required if this output is unused.

*When V_IN ≤ 1.3 V, the error flag pin becomes a high impedance, and the error flag voltage rises to its pullup voltage. Using V_OUT as the pullup voltage (see Figure 40), rather than an external 5-V source, keeps the error flag voltage under 1.2 V (typical) in this condition. The user may wish to divide down the error flag voltage using equal-value resistors (10 kΩ suggested), to ensure a low-level logic signal during any fault condition, while still allowing a valid high logic level during normal operation.

Figure 39. ERROR Output Timing

9.2.1.2.4 Programming the Output Voltage (LP2951-N)

The LP2951-N may be pin-strapped for the nominal fixed output voltage using its internal voltage divider by tying the output and sense pins together, and also tying the FEEDBACK and VTAP pins together. Alternatively, it may be programmed for any output voltage between its 1.235-V reference and its 30-V maximum rating. As seen in Figure 40, an external pair of resistors is required.

The complete equation for the output voltage is

Equation 7.

where

• V_REF is the nominal 1.235-V reference voltage and I_FB is the FEEDBACK pin bias current, nominally –20 nA

The minimum recommended load current of 1 µA forces an upper limit of 1.2 MΩ on the value of R₂, if the regulator must work with no load (a condition often found in CMOS in standby). I_FB produces a 2% typical error in V_OUT which may be eliminated at room temperature by trimming R₁. For better accuracy, choosing R₂ = 100 kΩ reduces this error to 0.17% while increasing the resistor program current to 12 µA. Because the LP2951-N typically draws 60 µA at no load with pin 2 open-circuited, this is a small price to pay.

*Drive with TTL-high to shut down. Ground or leave open if shutdown feature is not to be used.
Note: Pins 2 and 6 are left open.

Figure 40. Adjustable Regulator

Stray capacitance to the LP2951-N FEEDBACK pin can cause instability. This may especially be a problem when using high value external resistors to set the output voltage. Adding a 100-pF capacitor between the OUT pin and the FEEDBACK pin, and increasing the output capacitor to at least 3.3 µF, fixes this problem.

9.2.1.2.5 Reducing Output Noise

In reference applications it may be advantageous to reduce the AC noise present at the output. One method is to reduce the regulator bandwidth by increasing the size of the output capacitor. This is the only way noise can be reduced on the 3-lead LP2950-N but is relatively inefficient, as increasing the capacitor from 1 µF to 220 µF only decreases the noise from 430 µV_RMS to 160 µV_RMS for a 100-kHz bandwidth at 5-V output.

Noise can be reduced fourfold by a bypass capacitor across R1, because it reduces the high frequency gain from 4 to unity. Pick

Equation 8.

or about 0.01 µF. When doing this, the output capacitor must be increased to 3.3 µF to maintain stability. These changes reduce the output noise from 430 µV to 100 µV rms for a 100-kHz bandwidth at 5-V output. With the bypass capacitor added, noise no longer scales with output voltage so that improvements are more dramatic at higher output voltages.