米6体育平台手机版

ZHCSLK4R july 2004 – july 2023 LP2985 , LP2985A

PRODUCTION DATA

封装选项

机械数据 (封装 | 引脚)

DBV|5
- MPDS018T

散热焊盘机械数据 (封装 | 引脚)

订购信息

6.5 Electrical Characteristics

specified at T_J = 25°C, V_IN = V_OUT(nom) + 1.0 V or VIN = 2.5 V (whichever is greater), I_OUT = 1 mA, V_ON/OFF = 2 V, C_IN = 1.0 µF, and C_OUT = 2.2 µF (unless otherwise noted)

PARAMETER		TEST CONDITIONS		MIN	TYP	MAX	UNIT
∆V_OUT	Output voltage tolerance	I_L = 1 mA	Legacy chip (standard grade)	–1.5		1.5	%
			Legacy chip (A grade)	–1.0		1.0
			New chip	–0.5		0.5
		1 mA ≤ I_L ≤ 50 mA	Legacy chip (standard grade)	–2.5		2.5
			Legacy chip (A grade)	–1.5		1.5
			New chip	–0.5		0.5
		1 mA ≤ I_L ≤ 150 mA	Legacy chip (standard grade)	–3.0		3.0
			Legacy chip (A grade)	–2.5		2.5
			New chip	–0.5		0.5
		1 mA ≤ I_L ≤ 50 mA, –40°C ≤ T_J≤ 125°C	Legacy chip (standard grade)	–3.5		3.5
			Legacy chip (A grade)	–2.5		2.5
			New chip	–1		1
		1 mA ≤ I_L ≤ 150 mA, –40°C ≤ T_J≤ 125°C	Legacy chip (standard grade)	–4.0		4.0
			Legacy chip (A grade)	–3.5		3.5
			New chip	–1		1
ΔV_OUT(ΔVIN)	Line regulation	V_O(NOM) + 1 V ≤ V_IN ≤ 16 V	Legacy chip		0.007	0.014	%/V
		V_O(NOM) + 1 V ≤ V_IN ≤ 16 V	New chip		0.002	0.014
		V_O(NOM) + 1 V ≤ V_IN ≤ 16 V, –40°C ≤ T_J ≤ 125°C	Legacy chip		0.007	0.032
		V_O(NOM) + 1 V ≤ V_IN ≤ 16 V, –40°C ≤ T_J ≤ 125°C	New chip		0.002	0.032
V_IN - V_OUT	Dropout voltage⁽¹⁾	I_OUT = 0 mA	Legacy chip		1	3	mV
		I_OUT = 0 mA	New chip		1	2.75
		I_OUT = 0 mA, –40°C ≤ T_J≤ 125°C	Legacy chip			5
		I_OUT = 0 mA, –40°C ≤ T_J≤ 125°C	New chip			3
		I_OUT = 1 mA	Legacy chip		7	10
		I_OUT = 1 mA	New chip		11.5	14
		I_OUT = 1 mA, –40°C ≤ T_J≤ 125°C	Legacy chip			15
		I_OUT = 1 mA, –40°C ≤ T_J≤ 125°C	New chip			17
		I_OUT = 10 mA	Legacy chip		40	60
		I_OUT = 10 mA	New chip		98	115
		I_OUT = 10 mA, –40°C ≤ T_J≤ 125°C	Legacy chip			90
		I_OUT = 10 mA, –40°C ≤ T_J≤ 125°C	New chip			148
		I_OUT = 50 mA	Legacy chip		120	150
		I_OUT = 50 mA	New chip		120	145
		I_OUT = 50 mA, –40°C ≤ T_J≤ 125°C	Legacy chip			225
		I_OUT = 50 mA, –40°C ≤ T_J≤ 125°C	New chip			184
		I_OUT = 150 mA	Legacy chip		280	350
		I_OUT = 150 mA	New chip		180	198
		I_OUT = 150 mA, –40°C ≤ T_J≤ 125°C	Legacy chip			575
		I_OUT = 150 mA, –40°C ≤ T_J≤ 125°C	New chip			254
I_GND	GND pin current	I_OUT = 0 mA	Legacy chip		65	95	µA
		I_OUT = 0 mA	New chip		69	95
		I_OUT = 0 mA, –40°C ≤ T_J≤ 125°C	Legacy chip			125
		I_OUT = 0 mA, –40°C ≤ T_J≤ 125°C	New chip			123
		I_OUT = 1 mA	Legacy chip		75	110
		I_OUT = 1 mA	New chip		78	110
		I_OUT = 1 mA, –40°C ≤ T_J≤ 125°C	Legacy chip			170
		I_OUT = 1 mA, –40°C ≤ T_J≤ 125°C	New chip			140
		I_OUT = 10 mA	Legacy chip		120	220
		I_OUT = 10 mA	New chip		175	210
		I_OUT = 10 mA, –40°C ≤ T_J≤ 125°C	Legacy chip			400
		I_OUT = 10 mA, –40°C ≤ T_J≤ 125°C	New chip			250
		I_OUT = 50 mA	Legacy chip		350	600
		I_OUT = 50 mA	New chip		380	440
		I_OUT = 50 mA, –40°C ≤ T_J≤ 125°C	Legacy chip			900
		I_OUT = 50 mA, –40°C ≤ T_J≤ 125°C	New chip			650
		I_OUT = 150 mA	Legacy chip		850	1200
		I_OUT = 150 mA	New chip		765	890
		I_OUT = 150 mA, –40°C ≤ T_J≤ 125°C	Legacy chip			2000
		I_OUT = 150 mA, –40°C ≤ T_J≤ 125°C	New chip			1060
		V_ON/OFF < 0.3 V, V_IN = 16 V	Legacy chip		0.01	0.08
		V_ON/OFF < 0.3 V, V_IN = 16 V	New chip		1.25	1.75
		V_ON/OFF < 0.15 V, V_IN = 16 V, –40°C ≤ T_J≤ 85°C	Legacy chip		0	1
		V_ON/OFF < 0.15 V, V_IN = 16 V, –40°C ≤ T_J≤ 85°C	New chip		1.12	2.25
		V_ON/OFF < 0.15 V, V_IN = 16 V, –40°C ≤ T_J≤ 125°C	Legacy chip		0.01	2
		V_ON/OFF < 0.15 V, V_IN = 16 V, –40°C ≤ T_J≤ 125°C	New chip		1.12	2.75
V_UVLO+	Rising bias supply UVLO	V_IN rising, –40°C ≤ T_J ≤ 125°C	New chip		2.2	2.4	V
V_UVLO-	Falling bias supply UVLO	V_IN falling, –40°C ≤ T_J ≤ 125°C		1.9			V
V_UVLO(HYST)	UVLO hysteresis	–40°C ≤ T_J ≤ 125°C			0.130		V
V_ON/OFF	ON/OFF input voltage	Low = Output OFF	Legacy chip		0.55		V
		Low = Output OFF	New chip		0.72
		Low = Output OFF, V_OUT + 1 ≤ V_IN ≤ 16 V, –40°C ≤ T_J ≤ 125°C	Legacy chip			0.15
			New chip			0.15
		High = Output ON	Legacy chip		1.4
		High = Output ON	New chip		0.85
		High = Output ON, V_OUT + 1 ≤ V_IN ≤ 16 V, –40°C ≤ T_J ≤ 125°C	Legacy chip	1.6
			New chip	1.6
I_ON/OFF	ON/OFF input current	V_ON/OFF = 0 V	Legacy chip		0.01		µA
		V_ON/OFF = 0 V	New chip		0.42
		V_ON/OFF = 0 V, V_OUT + 1 ≤ V_IN ≤ 16 V, –40°C ≤ T_J≤ 125°C	Legacy chip			-1
		V_ON/OFF = 0 V, V_OUT + 1 ≤ V_IN ≤ 16 V, –40°C ≤ T_J≤ 125°C	New chip			-0.9
		V_ON/OFF = 5 V	Legacy chip		5
		V_ON/OFF = 5 V	New chip		0.011
		V_ON/OFF = 5 V, V_OUT + 1 ≤ V_IN ≤ 16 V, –40°C ≤ T_J≤ 125°C	Legacy chip			15
		V_ON/OFF = 5 V, V_OUT + 1 ≤ V_IN ≤ 16 V, –40°C ≤ T_J≤ 125°C	New chip			2.20
IO(PK)	Peak output current	V_OUT ≥ V_O(NOM) –5% (steady state)	Legacy chip	300	350		mA
IO(PK)	Peak output current	V_OUT ≥ V_O(NOM) –5% (steady state)	New chip	300	350
I_O(SC)	Short output current	R_L = 0 Ω (steady state)	Legacy chip		400
I_O(SC)	Short output current	R_L = 0 Ω (steady state)	New chip		375
ΔV_O/ΔV_IN	Ripple rejection	f = 1 kHz, C_BYPASS = 10 nF, C_OUT = 10 µF	Legacy chip		45		dB
ΔV_O/ΔV_IN	Ripple rejection	f = 1 kHz, C_BYPASS = 10 nF, C_OUT = 10 µF	New chip		78		dB
V_n	Output noise voltage	Bandwidth = 300 Hz to 50 kHz, C_BYPASS = 10 nF, C_OUT= 2.2 µF, V_OUT = 3.3 V, I_LOAD = 150 mA	Legacy chip		30		µ_VRMS
V_n	Output noise voltage	Bandwidth = 300 Hz to 50 kHz, C_BYPASS = 10 nF, C_OUT= 2.2 µF, V_OUT = 3.3 V, I_LOAD = 150 mA	New chip		30		µ_VRMS
T_sd+	Thermal shutdown threshold	Shutdown, temperature increasing	New chip		170		°C
T_sd-	Thermal shutdown threshold	Reset, temperature decreasing	New chip		150		°C

(1) Dropout voltage (V_DO) is defined as the input-to-output differential at which the output voltage drops 100 mV below the value measured with a 1 V differential. V_DO is measured with V_IN = V_OUT(nom)– 100 mV for fixed output devices.