ZHCSJT3B May 2019 – August 2020 LP5009 , LP5012
PRODUCTION DATA
- 1 特性
- 2 应用
- 3 说明
- 4 Revision History
- 5 Description (continued)
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 PWM Control for Each Channel
- 8.3.2 LED Bank Control
- 8.3.3 Current Range Setting
- 8.3.4 Automatic Power-Save Mode
- 8.3.5 Protection Features
- 8.4 Device Functional Modes
- 8.5 Programming
- 8.6
Register Maps
- 45
- 8.6.1 DEVICE_CONFIG0 (Address = 0h) [reset = 0h]
- 8.6.2 DEVICE_CONFIG1 (Address = 1h) [reset = 3Ch]
- 8.6.3 LED_CONFIG0 (Address = 2h) [reset = 00h]
- 8.6.4 BANK_BRIGHTNESS (Address = 3h) [reset = FFh]
- 8.6.5 BANK_A_COLOR (Address = 4h) [reset = 00h]
- 8.6.6 BANK_B_COLOR (Address = 5h) [reset = 00h]
- 8.6.7 BANK_C_COLOR (Address = 6h) [reset = 00h]
- 8.6.8 LED0_BRIGHTNESS (Address = 7h) [reset = FFh]
- 8.6.9 LED1_BRIGHTNESS (Address = 8h) [reset = FFh]
- 8.6.10 LED2_BRIGHTNESS (Address = 9h) [reset = FFh]
- 8.6.11 LED3_BRIGHTNESS (Address = 0Ah) [reset = FFh]
- 8.6.12 OUT0_COLOR (Address = 0Bh) [reset = 00h]
- 8.6.13 OUT1_COLOR (Address = 0Ch) [reset = 00h]
- 8.6.14 OUT2_COLOR (Address = 0Dh) [reset = 00h]
- 8.6.15 OUT3_COLOR (Address = 0Eh) [reset = 00h]
- 8.6.16 OUT4_COLOR (Address = 0Fh) [reset = 00h]
- 8.6.17 OUT5_COLOR (Address = 10h) [reset = 00h]
- 8.6.18 OUT6_COLOR (Address = 11h) [reset = 00h]
- 8.6.19 OUT7_COLOR (Address = 12h) [reset = 00h]
- 8.6.20 OUT8_COLOR (Address = 13h) [reset = 00h]
- 8.6.21 OUT9_COLOR (Address = 14h) [reset = 00h]
- 8.6.22 OUT10_COLOR (Address = 15h) [reset = 00h]
- 8.6.23 OUT11_COLOR (Address = 16h) [reset = 00h]
- 8.6.24 RESET (Address = 17h) [reset = 00h]
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
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- RUK|20
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9.2.2 Detailed Design Procedure
LP50xx scales up the reference current (IREF) set by the external resistor (RIREF) to sink the output current (IOUT) at each output port. The following formula can be used to calculate the external resistor (RIREF):
The SCL and SDA lines must each have a pullup resistor placed somewhere on the line (the pullup resistors are normally located on the bus master). In typical applications, values of 1.8 kΩ to 4.7 kΩ are used.
VCAP is internal LDO output pin. This pin must be connected through a 1-µF capacitor to GND. Place the capacitor as close to the device as possible.
TI recommends having a 1-µF capacitor between VCC and GND to ensure proper operation. Place the capacitor as close to the device as possible.