ZHCSOR4 December 2021 LP5862
PRODUCTION DATA
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | VCC | Power | Power supply for device. A 1-μF capacitor must be connected between this pin with GND and be placed as close to the device as possible. |
2 | CS0 | O | Current sink 0. If not used, this pin must be left floating. |
3 | CS1 | O | Current sink 1. If not used, this pin must be left floating. |
4 | CS2 | O | Current sink 2. If not used, this pin must be left floating. |
5 | CS3 | O | Current sink 3. If not used, this pin must be left floating. |
6 | CS4 | O | Current sink 4. If not used, this pin must be left floating. |
7 | CS5 | O | Current sink 5. If not used, this pin must be left floating. |
8 | CS6 | O | Current sink 6. If not used, this pin must be left floating. |
9 | CS7 | O | Current sink 7. If not used, this pin must be left floating. |
10 | CS8 | O | Current sink 8. If not used, this pin must be left floating. |
11/12 | SW0 | O | High-side PMOS switch output 0. Both 2 pins must be tied together. If not used, this pin must be left floating. |
13/14 | SW1 | O | High-side PMOS switch output 1. Both 2 pins must be tied together. If not used, this pin must be left floating. |
15 | VLED | Power | Power input for high-side switches |
16 | CS9 | O | Current sink 9. If not used, this pin must be left floating. |
17 | CS10 | O | Current sink 10. If not used, this pin must be left floating. |
18 | CS11 | O | Current sink 11. If not used, this pin must be left floating. |
19 | CS12 | O | Current sink 12. If not used, this pin must be left floating. |
20 | CS13 | O | Current sink 13. If not used, this pin must be left floating. |
21 | CS14 | O | Current sink 14. If not used, this pin must be left floating. |
22 | CS15 | O | Current sink 15. If not used, this pin must be left floating. |
23 | CS16 | O | Current sink 16. If not used, this pin must be left floating. |
24 | CS17 | O | Current sink 17. If not used, this pin must be left floating. |
25 | VCAP | O | Internal LDO output. An 1-μF capacitor must be connected between this pin with GND. Place the capacitor as close to the device as possible. |
26 | IFS | I | Interface type select. I2C is selected when IFS is low. SPI is selected when IFS is high. A resistor must be connected between VIO and this pin. |
27 | VSYNC | I | External synchronize signal for display mode 2 and mode 3 |
28 | SCL_SCLK | I | I2C clock input or SPI clock input. Pull up to VIO when configured as I2C. |
29 | SDA_MOSI | I/O | I2C data input or SPI leader output follower input. Pull up to VIO when configured as I2C. |
30 | ADDR0_MISO | I/O | I2C address select 0 or SPI leader input follower output |
31 | ADDR1_SS | I | I2C address select 1 or SPI follower select |
32 | VIO_EN | Power,I | Power supply for digital circuits and chip enable. A 1-nF capacitor must be connected between this pin with GND and be placed as close to the device as possible. |
Exposed Thermal Pad | GND | Ground | Common ground plane |