ZHCSD11D September   2014  – December 2018 LP5907-Q1

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      简化原理图
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Output and Input Capacitors
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 LP5907-Q1 Voltage Options
      2. 7.3.2 Enable (EN)
      3. 7.3.3 Low Output Noise
      4. 7.3.4 Output Automatic Discharge
      5. 7.3.5 Remote Output Capacitor Placement
      6. 7.3.6 Thermal Overload Protection (TSD)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable (EN)
      2. 7.4.2 Minimum Operating Input Voltage (VIN)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Power Dissipation and Device Operation
        2. 8.2.2.2 External Capacitors
        3. 8.2.2.3 Input Capacitor
        4. 8.2.2.4 Output Capacitor
        5. 8.2.2.5 Capacitor Characteristics
        6. 8.2.2.6 Remote Capacitor Operation
        7. 8.2.2.7 No-Load Stability
        8. 8.2.2.8 Enable Control
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11器件和文档支持
    1. 11.1 接收文档更新通知
    2. 11.2 社区资源
    3. 11.3 商标
    4. 11.4 静电放电警告
    5. 11.5 术语表
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Pin Configuration and Functions

DBV Package
5-Pin SOT-23
Top View
LP5907-Q1 pinout_snvsa34.gif
DQN Package (Preview)
4-Pin X2SON
Bottom View
LP5907-Q1 QFN.gif

Pin Functions

PIN I/O DESCRIPTION
NAME SOT23-5 X2SON-4
EN 3 3 I Enable input. A low voltage (< VIL) on this pin turns the regulator off and discharges the output pin to GND through an internal 230-Ω pulldown resistor. A high voltage (> VIH) on this pin enables the regulator output. This pin has an internal 1-MΩ pulldown resistor to hold the regulator off by default.
GND 2 2 – Common ground
IN 1 4 I Input voltage supply. Connect a 1-µF capacitor at this input.
N/C 4 — – No internal electrical connection.
OUT 5 1 O Regulated output voltage. Connect a minimum 1-µF low-ESR capacitor to this pin. Connect this output to the load circuit. An internal 230-Ω (typical) pulldown resistor prevents a charge remaining on VOUT when the regulator is in the shutdown mode (VEN low).
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