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ZHCSFR8 November 2016 LP5922

PRODUCTION DATA.

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾⁽²⁾

	MIN	MAX	UNIT
IN pin voltage, V_IN	–0.3	7	V
OUT pin voltage, V_OUT		See⁽³⁾
EN pin voltage, V_EN	–0.3	7	V
PG pin voltage, V_PG	–0.3	7	V
SS/NR pin voltage, V_SS/NR	–0.3	3.6	V
FB pin voltage, V_FB	–0.3	3.6	V
Junction temperature, T_J		150	°C
Continuous power dissipation⁽⁴⁾	Internally limited
Storage temperature, T_stg	–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltages are with respect to the potential at the GND pin.

(3) Absolute maximum V_OUT is the lesser of V_IN + 0.3 V, or 7 V.

(4) Internal thermal shutdown circuitry protects the device from permanent damage.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±1000	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

	MIN	NOM	MAX	UNIT
Input voltage, V_IN	1.3		6	V
Output voltage, V_OUT	0.5		5	V
FB voltage, V_FB		0.5		V
EN input voltage, V_EN	0		V_IN	V
Recommended load current, I_L	0		2	A
Operating junction temperature, T_J-MAX-OP	–40		125	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		LP5922	UNIT
		DSC (WSON)
		10 PINS
R_θJA⁽²⁾	Junction-to-ambient thermal resistance, High K	49.5⁽³⁾	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	38.2	°C/W
R_θJB	Junction-to-board thermal resistance	24.0	°C/W
ψ_JT	Junction-to-top characterization parameter	0.5	°C/W
ψ_JB	Junction-to-board characterization parameter	24.1	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	6.0	°C/W

(1) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.

(2) Thermal resistance value R_θJA is based on the EIA/JEDEC High-K printed circuit board defined by JESD51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages.

(3) The PCB for the WSON/DSC package R_θJA includes four (4) thermal vias, in a 2 × 2 array, under the exposed thermal pad per EIA/JEDEC JESD51-5.

6.5 Electrical Characteristics

V_IN = V_OUT(NOM) + 0.5 V or 1.3 V, whichever is greater; V_EN = 1.2 V, C_IN = 22 μF, C_OUT = 22 μF, OUT connected to 50 Ω to GND, V_FB = 0.5 V, C_SS/NR = 0.12 µF, C_FF = 0.01 µF, and PG pin pulled up to V_IN by 100-kΩ resistor (unless otherwise noted).⁽¹⁾⁽²⁾⁽³⁾

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
SUPPLY VOLTAGE
V_IN	Input voltage range		1.3		6	V
UVLO	Undervoltage lock-out threshold	V_IN Rising (↑) until output is ON		1.2	1.25	V
ΔUVLO	UVLO hysteresis	V_IN Falling (↓) from UVLO threshold until output is OFF		160		mV
OUTPUT VOLTAGE AND REGULATION
V_OUT	Output voltage range		0.5		5	V
ΔV_OUT	Line regulation	I_OUT = 5 mA, 1.3 V ≤ V_IN ≤ 6 V		0.02		%/V
ΔV_OUT	Load regulation	5 mA ≤ I_OUT ≤ 2 A		0.1		%/A
V_DO	Dropout voltage⁽⁴⁾	V_IN = 1.4 V, I_OUT = 2 A		220	400	mV
		V_IN = 2.5 V, I_OUT = 2 A		100	180
		V_IN = 5.3 V, I_OUT = 2 A		90	160
FB
V_FB	FB voltage	I_OUT = 5 mA to 2 A	492.5	500	507.5	mV
I_FB	FB pin input current	V_FB = 0.5 V	–100		100	nA
CURRENT LEVELS
I_L	Maximum load current	V_IN≥ 1.3 V	2			A
I_SC	Short-circuit current limit⁽⁵⁾		2.2	3	3.8	A
I_GND	Ground-current minimum load⁽⁷⁾	V_IN = 6 V, I_OUT = 0 mA		0.7		mA
I_GND	Ground-current maximum load⁽⁷⁾	V_IN = 1.3 V, I_OUT = 2 A		1	4	mA
I_GND(SD)	Shutdown current⁽⁶⁾	V_IN = 6 V, V_EN = 0 V, V_PG = 0 V		0.1	15	µA
V_IN to V_OUT RIPPLE REJECTION ⁽⁹⁾
PSRR	Power-supply rejection ratio	V_IN ≥ 1.4 V, ƒ = 1 kHz, I_OUT = 2 A		70		dB
		V_IN ≥ 1.4 V, ƒ = 10 kHz, I_OUT = 2 A		55
		V_IN ≥ 1.4 V, ƒ = 100 kHz, I_OUT = 2 A		40
		V_IN ≥ 1.4 V, ƒ = 1 MHz, I_OUT = 2 A		30
OUTPUT NOISE VOLTAGE
e_N	Noise voltage⁽⁹⁾	V_IN= 2.5 V, V_OUT= 1.8 V BW = 10 Hz to 100 kHz		25		µV_RMS
LOGIC INPUT THRESHOLDS
V_IL(EN)	EN pin low threshold	V_EN falling (↓) until output is OFF			0.35	V
V_IH(EN)	EN pin high threshold	V_EN rising (↑) until output is ON	1.2			V
I_EN	Input current at EN pin ⁽⁸⁾	V_IN = 6 V, V_EN = 6 V		3		µA
PG_HTH	PG high threshold (% of nominal V_OUT)	V_OUT rising (↑) until PG goes high		94%
PG_LTH	PG low threshold (% of nominal V_OUT)	V_OUT falling (↓) until PG goes low		90%
V_OL(PG)	PG pin low-level output voltage	V_OUT < PG_LTH, sink current = 1 mA			400	mV
I_LKG(PG)	PG pin leakage current	V_OUT > PG_HTH, V_PG = 6 V			1	µA
SOFT START
I_SS	SS/NR pin charging current			6.2		µA
THERMAL SHUTDOWN
T_SD	Thermal shutdown temperature			165		°C
ΔT_SD	Thermal shutdown hysteresis			15		°C
TRANSITION CHARACTERISTICS
ΔV_OUT	Line transients	ΔV_IN = 0.5 V, V_OUT= 2.8 V, t_RISE= t_FALL = 5 μs		3		mV
ΔV_OUT	Load transients	V_OUT = 3.3 V, I_OUT = 10 mA to 2 A to 10 mA t_RISE= t_FALL = 1 V/μs		25		mV
R_AD	Output discharge pull-down resistance	V_EN = 0 V, V_IN = 2.3 V		400		Ω

(1) All voltages are with respect to the GND pin.

(2) Minimum and maximum limits are design targeted limits over the junction temperature (T_J) range of –40°C to +125°C, unless otherwise stated. Typical values represent the most likely parametric norm at T_J = 25°C, and are provided for reference purposes only.

(3) C_IN, C_OUT: Low-ESR surface-mount-ceramic capacitors (MLCCs) used in setting electrical characteristics.

(4) Dropout voltage is the voltage difference between the input and the output at which the FB voltage drops to 97% of its nominal value.

(5) Short-circuit current (I_SC) is equivalent to current limit. To minimize thermal effects during testing, I_SC is measured with V_OUT pulled to 100 mV below its nominal voltage.

(6) Ground current in shutdown mode, I_GND(SD), does NOT include current from PG pin.

(7) Ground current is defined here as the total current flowing to ground as a result of all voltages applied to the device
I_GND = ( (I_IN – I_OUT) + I_EN + I_LKG(PG))

(8) There is a 2-MΩ resistor between EN and ground (pulldown) on the device.

(9) This specification is verified by design.

6.6 Input and Output Capacitors

over operating free-air temperature range (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	UNIT
C_IN	Input capacitance⁽¹⁾			22	µF
C_OUT	Output capacitance	V_OUT ≤ 0.8 V	34	47	µF
C_OUT	Output capacitance	V_OUT > 0.8 V	15	22	µF

(1) Typically input capacitance placed close to the device is in the same order as output capacitance. See also Input Capacitor, CIN.

6.7 Typical Characteristics

V_IN = V_OUT + 0.5 V, V_EN = 1.2 V, C_IN = 22 μF, C_OUT = 22 μF, OUT connected to 50 Ω to GND, V_FB = 0.5 V, C_SS/NR = 0.12 µF, C_FF = 0.01 µF, and PG pin pulled up to V_IN by 100-kΩ resistor and T_J = 25°C, unless otherwise stated.