The device is designed to operate from a VDD input voltage supply range from 2.7 V to 20 V. This input supply must be well regulated and able to withstand maximum input current and maintain stable voltage without voltage drop even at load transition condition (start-up or rapid brightness change). The resistance of the input supply rail must be low enough that the input current transient does not cause drop high enough in the LP8556 supply voltage that can cause false UVLO fault triggering.

If the input supply is located more than a few inches from the LP8556 device, additional bulk capacitance may be required in addition to the ceramic bypass capacitors. Depending on device EEPROM configuration and usage case the boost converter is configured to operate optimally with certain input voltage range.