ZHCSD61L July 2012 – May 2019 LP8556
PRODUCTION DATA.
With BRT_MODE = 01, the PWM output is controlled by the PWM input duty cycle and the Brightness register. The PWM detector block measures the duty cycle at the PWM pin and uses this 16-bit value to generate the PWM data. Before the output is generated, the PWM data is first multiplied with BRT[7:0] register, then it goes through the PWM Curve Shaper block. Then, the data goes into the Adaptive Dimming function which determines the range of the PWM and Current control as described in Output Dimming Schemes. The outcome of the Adaptive Dimming function is 12-bit current and/or up to 6 PWM output signals. The current is then passed through the non-linear compensation block while the output PWM signals are channeled through the Dither block.