ZHCSLV4 December 2020 LP875761-Q1
PRODUCTION DATA
Address: 0x2C
D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
EN_SPREAD_SPEC | EN_PIN_CTRL_GPIO3 | EN_PIN_SELECT_GPIO3 | EN_PIN_CTRL_GPIO2 | EN_PIN_SELECT_GPIO2 | GPIO3_SEL | GPIO2_SEL | GPIO1_SEL |
Bits | Field | Type | Default | Description |
---|---|---|---|---|
7 | EN_SPREAD_SPEC | R/W | X | This bit enables the spread-spectrum
feature. 0h = Disabled 1h = Enabled |
6 | EN_PIN_CTRL_GPIO3 | R/W | X | This bit enables
EN1 and EN2 pin control for GPIO3 (the GPIO3_SEL bit is set to 1h
AND the GPIO3_DIR bit is set to 1h). 0h = Only GPIO3_OUT bit controls GPIO3 1h = GPIO3_OUT bit AND ENx pin control GPIO3 |
5 | EN_PIN_SELECT_GPIO3 | R/W | X | This bit enables
EN1 and EN2 pin control for GPIO3. 0h = GPIO3_SEL bit AND EN1 pin control GPIO3 1h = GPIO3_SEL bit AND EN2 pin control GPIO3 |
4 | EN_PIN_CTRL_GPIO2 | R/W | X | This bit enables
EN1 and EN3 pin control for GPIO2 (the GPIO2_SEL bit is set to 1h
AND the GPIO2_DIR bit is set to 1h). 0h = Only GPIO2_OUT bit controls GPIO2 1h = GPIO2_OUT bit AND ENx pin control GPIO2 |
3 | EN_PIN_SELECT_GPIO2 | R/W | X | This bit enables
EN1 and EN3 pin control for GPIO2 0h = GPIO2_SEL bit AND EN1 pin control GPIO2 1h = GPIO2_SEL bit AND EN3 pin control GPIO2 |
2 | GPIO3_SEL | R/W | X | This bit selects
the EN3 pin function 0h = EN3 1h = GPIO3 |
1 | GPIO2_SEL | R/W | X | This bit selects
the EN2 pin function 0h = EN2 1h = GPIO2 |
0 | GPIO1_SEL | R/W | X | This bit selects
the EN1 pin function 0h = EN1 1h = GPIO1 |