ZHCSLV4 December 2020 LP875761-Q1
PRODUCTION DATA
The input capacitors CIN0, CIN1, CIN2, and CIN3 are shown in Section 8.2. A ceramic input bypass capacitor of 10 μF is required for each phase of the regulator. Place the input capacitor as close as possible to the VIN_Bx pin and PGND_Bx pin of the device. A larger value or higher voltage rating improves the input voltage filtering. Use X7R type of capacitors, not Y5V or F. DC bias characteristics capacitors must be considered. The minimum effective input capacitance to make sure performance is good is 1.9 μF for each buck input at the maximum input voltage including tolerances and ambient temperature range. This value assumes that at least 22 μF of additional capacitance is common for all the power input pins on the system power rail. See Table 8-2.
The input filter capacitor supplies current to the high-side FET switch in the first half of each cycle and decreases voltage ripple imposed on the input power source. A ceramic capacitor's low ESR provides the best noise filtering of the input voltage spikes due to this rapidly changing current. Select an input filter capacitor with sufficient ripple current rating. In addition ferrite can be used in front of the input capacitor to decrease the EMI.
MANUFACTURER | PART NUMBER | VALUE | CASE SIZE | DIMENSIONS L × W × H (mm) | VOLTAGE RATING (V) |
---|---|---|---|---|---|
Murata | GCM21BR71A106KE22 | 10 µF (10%) | 0805 | 2 × 1.25 × 1.25 | 10 V |