ZHCSDQ0C March 2015 – August 2018 LP8758-B0
PRODUCTION DATA.
The regulator's output voltage can be changed by the ENx pin (voltage levels defined by the BUCK0_VOUT and BUCK0_FLOOR_VOUT registers) or by writing to the BUCK0_VOUT and BUCK0_FLOOR_VOUT registers. The voltage change is always slew-rate controlled, and the slew-rate is defined by the BUCKx_CTRL2.SLEW_RATE[2:0] bits. During voltage change the Forced PWM mode is used automatically. If the multi-phase operation is forced by the BUCK0_CTRL1. BUCK0_FPWM_MP bit, the regulator operates in multi-phase mode (four phases active). If the multi-phase operation is not forced, the number of phases are added and shedded automatically to follow the required slew rate. When the programmed output voltage is achieved, the mode becomes the one defined by load current, and the BUCK0_CTRL1.BUCK0_FPWM and BUCK0_CTRL1.BUCK0_FPWM_MP bits.