Catastrophic errors are errors that affect multiple power resources such as errors detected in supply voltage, LDOVINT supply for control logic, errors on internal clock signals, and device temperature passing the thermal shutdown threshold, error detected on the SPMI bus, or an error detected in the PFSM sequence.

Following errors are grouped as severe errors:

• VCCA ⩾ OVP threshold
• Junction temperature ⩾ immediate shutdown level
• Error in PFSM Sequence

For these above listed errors, depending on the setting of bits SEVERE_ERR_TRIG[1:0], an immediate or orderly shutdown condition is created. The PFSM executes the corresponding sequence for the IMMEDIATE_SHUTDOWN trigger or the ORDERLY_SHUTDOWN trigger and enters the SAFE RECOVERY state.

Following errors are grouped as moderate errors:

• Junction temperature ⩾ orderly shutdown level
• BIST failure
• CRC error in register map
• Recovery counter exceeding the threshold value
• Error on SPMI bus
• Readback error on nRSTOUT pin or nINT pin

For these above listed errors, depending on the setting of bits MODERATE_ERR_TRIG[1:0], an immediate or orderly shutdown condition is created. The PFSM executes the corresponding sequence for the IMMEDIATE_SHUTDOWN trigger or the ORDERLY_SHUTDOWN trigger and enters the SAFE RECOVERY state.

For following errors, the device performs an immediate shutdown and resets all internal logic circuits:

• VCCA < UVLO threshold
• Error on LDOVINT supply
• Errors on internal clock signals
• Unrecoverable CRC error in the SRAM memory of the PFSM

For all of the above listed errors, the device resets the attached MCU and SoC by driving the GPIO pins used as nRSTOUT and nRSTOUT_SoC pins low. All of the power resources assigned to the MCU and SOC are shut down. The nINT pin is driven low to signal an interrupt event has occurred, and the GPIO pins used as EN_DRV pin is forced low.