In Level Mode, after MCU has set the start bit (bit ESM_MCU_START ), the ESM_MCU monitors its nERR_MCU input pin. The ESM _MCU detects an ESM-error when the voltage level on its input pin remains low for a time equal or longer than the deglitch-time t_{degl_ESMx}. When the ESM_MCU detects an ESM-error, it starts the ESM Error-Handling procedure as described in Section 8.15.1. The Error-Handling Procedure is stopped if, before elapse of the delay-1 or delay-2 interval, the voltage level on the input pin remains high for a time equal or longer than the deglitch-time t_{degl_ESMx} and the MCU clears all corresponding interrupt bits. If the ESM-error persists such that the configured delay-1 and delay-2 times elapse, the ESM_MCU sends a ESM_MCU_RST trigger to the PFSM and the device clear the ESM_MCU_START bit. After the PFSM completes the handling of the ESM_MCU_RST trigger, the device re-initializes the ESM_MCU.

For a complete overview on how the ESM_MCU works in Level Mode, please refer to the flow-chart in Figure 8-51. In this flow-chart, the _x stands for _MCU. Figure 8-52, Figure 8-53, Figure 8-54, and Figure 8-55 show example wave forms for several error-cases for the ESM_MCU in Level Mode.