ZHCSCK8G May 2014 – October 2017 LP8860-Q1
PRODUCTION DATA.
In this mode the LED brightness is controlled by the input PWM duty cycle. The PWM detector block measures the duty cycle in the PWM pin and uses this 16-bit value to control the duty cycle of the LED output PWM. Input PWM period is measured from rising edge to the next rising edge.
The ratio of input PWM frequency and 10-MHz sampling clock defines resolution reachable with external PWM.
PWM input block timeout is 24 ms after the last rising edge; it must be taken into account for 0% and 100% brightness setting. For setting 100% brightness, a high-level PWM input signal must last at least 24 ms. The minimum on and off time for the PWM input signal is 400 ns.