ZHCSLM3B August 2020 – May 2024 LP8864-Q1
PRODUCTION DATA
shows the critical part of circuitry: SEPIC components, the LP8864-Q1 internal charge pump for gate-driver powering, and powering/grounding of LP8864-Q1. Schematic example is shown below.
REFERENCE DESIGNATOR | DESCRIPTION | NOTE |
---|---|---|
RISENSE | 20mΩ, 1W | Input current sensing resistor |
RSD | 20kΩ, 0.1W | Power-line FET gate pullup resistor |
RSENSE | 50mΩ, 1W | Boost current sensing resistor |
RG | 15Ω, 0.1W | Gate resistor to control the rising/falling time of nMOSFET for EMC |
RUVLO1 | 76.8kΩ, 0.1W | These UVLO resistor settings set the VIN_UVLO rising voltage at 3.75 V, VIN_UVLO falling voltage at 3.35V |
RUVLO2 | 20.5kΩ, 0.1W | |
RFB2 | 60kΩ, 0.1W | Bottom feedback divider resistor |
RFB1 | 330kΩ, 0.1W | Top feedback divider resistor |
RBST_FSET | 124kΩ, 0.1W | Boost frequency set resistor (2200kHz) |
RISET | 38.7 kΩ, 0.1W | Current set resistor (80mA per channel) |
RPWM_FSET | 4.75kΩ, 0.1W | Output PWM frequency set resistor (305Hz PWM frequency) |
RMODE | 3.92kΩ, 0.1W | Mode resistor (Phase-Shift PWM mode with 0x3B I2C address) |
RLED_SET | 4.75kΩ, 0.1W | LED_SET resistor (3 channels configuration) |
CPUMP | 10µF, 10V ceramic | Charge-pump output capacitor |
C2X | 2.2µF, 10V ceramic | Flying capacitor |
CVDD | 4.7µF + 0.1µF, 10V ceramic | VDD bypass capacitor |
CIN | 1 × 33µF, 50V electrolytic + 1 × 10-µF, 50V ceramic | Boost input capacitor |
COUT | 1 × 33µF, 50V electrolytic + 1 × 10-µF, 50V ceramic | Boost output capacitor |
CS1 | 10µF, 50V ceramic | SEPIC coupling capacitor |
CS2 | 33µF, 50V electrolytic | SEPIC coupling capacitor |
RS | 2Ω, 0.125W | SEPIC resistor |
L1 | 4.7µH saturation current 3A | SEPIC inductor |
L2 | 4.7µH saturation current 3A | SEPIC inductor |
D1 | 50V 10A Schottky diode | SEPIC Schottky diode |
Q1 | 60V, 25A nMOSFET | SEPIC nMOSFET |
Q2 | 60V, 30A pMOSFET | Power-line FET |