ZHCSDK3 March   2015 LPV542

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Ratings
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics 1.8 V
    6. 6.6 Electrical Characteristics 3.3 V
    7. 6.7 Electrical Characteristics 5 V
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Rail-To-Rail Input
      2. 7.4.2 Supply Current Changes over Common Mode
      3. 7.4.3 Design Optimization With Rail-To-Rail Input
      4. 7.4.4 Design Optimization for Nanopower Operation
      5. 7.4.5 Common-Mode Rejection
      6. 7.4.6 Output Stage
      7. 7.4.7 Driving Capacitive Load
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application: 60 Hz Twin "T" Notch Filter
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 开发支持
    2. 11.2 文档支持
      1. 11.2.1 相关文档
    3. 11.3 商标
    4. 11.4 静电放电警告
    5. 11.5 术语表
  12. 12机械封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6 Specifications

6.1 Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise noted)(1)(2)(3)
MIN MAX UNIT
Supply voltage, V+ to V– -0.3 6 V
Signal input pins Voltage(2) (V-) - 0.3 (V+) + 0.3 V
Current(2) -10 10 mA
Output short current Continuous(4)
Junction temperature -40 150 °C
Storage temperature, Tstg -65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Input pins are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3 V beyond the supply rails should be current-limited to 10 mA or less.
(3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications.
(4) Short-circuit to V-.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 V
Charged device model (CDM), per JEDEC specification JESD22-C101,
all pins(2)		 ±250
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Ratings

MIN NOM MAX UNIT
Supply Voltage ( V+– V− ) 1.6 5.5 V
Specified Temperature -40 125 °C

6.4 Thermal Information

THERMAL METRIC(1) DGK (VSSOP) DNX (X1SON) UNIT
8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 46.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 33.3
RθJB Junction-to-board thermal resistance 21
ψJT Junction-to-top characterization parameter 0.2
ψJB Junction-to-board characterization parameter 21.2
RθJC(bot) Junction-to-case (bottom) thermal resistance 7
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics 1.8 V

TA = 25°C, V+ = 1.8V, V− = 0V, VCM = VO = V+/2, and RL > 1 MΩ , unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
OFFSET VOLTAGE
Input offset voltage (VOS) VCM = 0.3 V ±1 ±2 mV
VCM = 1.5 V ±1 ±3
Over temperature VCM = 0.3 V and 1.5 V ±4
Drift (dVOS/dT) 1 µV/°C
Power-Supply Rejection Ratio (PSRR) VS = 1.6 V to 5.5 V, VCM = 0.3 V 83 109 dB
INPUT VOLTAGE RANGE
Common-mode voltage range (VCM) CMRR ≥ 60 dB 0 1.8 V
Common-Mode Rejection Ratio (CMRR) 0 V < VCM < 1.8 V 63 92 dB
0 V < VCM < 0.7 V 87 92
1.3 V < VCM < 1.8 V 63 98
INPUT BIAS CURRENT
Input bias current (IB) TA = 25°C ±0.1 ±1 pA
TA = –40°C to 125°C ±100
Input offset current (IOS) ±0.1 ±1
INPUT IMPEDANCE
Differential 1013 || 2.5 Ω || pF
Common mode 1013 || 2.5
NOISE
Input voltage noise density, f = 1 kHz (en) 250 nV/√Hz
Current noise density, f = 1 kHz (in) 80 fA√Hz
OPEN-LOOP GAIN
Open-loop voltage gain (AOL) RL = 100 kΩ to V+/2, 0.5 V < VO < 1.3 V 91 101 dB
OUTPUT
Voltage output swing from positive rail RL = 100 kΩ to V+/2 3 20 mV
Voltage output swing from negative rail RL = 100 kΩ to V+/2 2 20
Output current sourcing Sourcing, VO to V–, VIN(diff) = 100 mV 1 3 mA
Output current sinking Sinking, VO to V+, VIN(diff) = –100 mV 1 5
FREQUENCY RESPONSE
Gain-bandwidth product (GBWP) CL = 20 pF 7 kHz
Slew rate (SR) G = +1, Rising edge, 1Vp-p, CL = 20 pF 3.4 V/ms
G = +1, Falling edge, 1Vp-p, CL = 20 pF 3.7
POWER SUPPLY
Specified voltage range (VS) 1.6 5.5 V
Quiescent current per channel (IQ) VCM = 0.3 V, IO = 0 490 800 nA
Over temperature 1100
Quiescent current per channel (IQ) VCM = 1.5 V, IO = 0 680 1100
Over temperature 1500

6.6 Electrical Characteristics 3.3 V

TA = 25°C, V+ = 3.3V, V− = 0V, VCM = VO = V+/2, and RL > 1 MΩ , unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
OFFSET VOLTAGE
Input offset voltage (VOS) VCM = 0.3 ±1 ±2 mV
VCM = 3 V ±1 ±3
Over temperature VCM = 0.3 V and 3 V ±4
Drift (dVOS/dT) 1 µV/°C
Power-Supply Rejection Ratio (PSRR) VS = 1.6 V to 5.5 V, VCM = 0.3 V 83 109 dB
INPUT VOLTAGE RANGE
Common-mode voltage range (VCM) CMRR ≥ 60 dB 0 3.3 V
Common-Mode Rejection Ratio (CMRR) 0 V < VCM < 3.3 V 64 98 dB
0 V < VCM < 2.2V 88 98
2.7 V < VCM < 3.3 V 64 105
INPUT BIAS CURRENT
Input bias current (IB) TA = 25°C ±0.1 ±1 pA
TA = –40°C to 125°C ±100
Input offset current (IOS) ±0.1 ±1
INPUT IMPEDANCE
Differential 1013 || 2.5 Ω || pF
Common mode 1013 || 2.5
NOISE
Input voltage noise density, f = 1 kHz (en) 250 nV/√Hz
Current noise density, f = 1 kHz (in) 60 fA√Hz
OPEN-LOOP GAIN
Open-loop voltage gain (AOL) RL = 100 kΩ to V+/2, 0.5 V < VO < 2.8 V 91 101 dB
OUTPUT
Voltage output swing from positive Rail RL = 100 kΩ to V+/2 3 20 mV
Voltage output swing from negative Rail RL = 100 kΩ to V+/2 2 20
Output current sourcing Sourcing, VO to V–, VIN(diff) = 100 mV 5 14 mA
Output current sinking Sinking, VO to V+, VIN(diff) = –100 mV 5 19
FREQUENCY RESPONSE
Gain-bandwidth product (GBWP) CL = 20 pF 8 kHz
Slew rate (SR) G = +1, Rising edge, 1Vp-p, CL = 20 pF 3.6 V/ms
G = +1, Falling edge, 1Vp-p, CL = 20 pF 3.7
POWER SUPPLY
Specified voltage range (VS) 1.6 5.5 V
Quiescent current per channel (IQ) VCM = 0.3 V, IO = 0 480 800 nA
Over temperature 1200
Quiescent current per channel (IQ) VCM = 3 V, IO = 0 650 1100
Over temperature 1500

6.7 Electrical Characteristics 5 V

TA = 25°C, V+ = 5 V, V− = 0 V, VCM = VO = V+/2, and RL > 1 MΩ , unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
OFFSET VOLTAGE
Input offset voltage (VOS) VCM = 0.3 V ±1 ±2 mV
VCM = 4.7V ±1 ±3
Over temperature VCM = 0.3 V and 4.7V ±4
Drift (dVOS/dT) 1 µV/°C
Power-Supply Rejection Ratio (PSRR) VS = 1.6 V to 5.5 V, VCM = 0.3 V 83 109 dB
INPUT VOLTAGE RANGE
Common-Mode voltage range (VCM) CMRR ≥ 60 dB 0 5 V
Common-Mode Rejection Ratio (CMRR) 0 V < VCM < 5 V 73 101 dB
0 V < VCM < 3.9V 88 101
4.4 V < VCM < 5 V 73 109
INPUT BIAS CURRENT
Input bias current (IB) TA = 25°C ±0.1 ±1 pA
TA = –40°C to 125°C ±100
Input offset current (IOS) ±0.1 ±1
INPUT IMPEDANCE
Differential 1013 || 2.5 Ω || pF
Common mode 1013 || 2.5
NOISE
Input voltage noise density, f = 1 kHz (en) 250 nV/√Hz
Current noise density, f = 1 kHz (in) 65 fA√Hz
OPEN-LOOP GAIN
Open-loop voltage gain (AOL) RL = 100 kΩ to V+/2, 0.5 V < VO < 4.5 V 91 101 dB
OUTPUT
Voltage output swing from positive rail RL = 100 kΩ to V+/2 3 20 mV
Voltage output swing from negative rail RL = 100 kΩ to V+/2 2 20
Output current sourcing Sourcing, VO to V–, VIN(diff) = 100 mV 10 30 mA
Output current sinking Sinking, VO to V+, VIN(diff) = –100 mV 10 36
FREQUENCY RESPONSE
Gain-bandwidth product (GBWP) CL = 20 pF 8 kHz
Slew rate (SR) G = +1, Rising edge, 1Vp-p, CL = 20 pF 3.6 V/ms
G = +1, Falling edge, 1Vp-p, CL = 20 pF 3.7
POWER SUPPLY
Specified voltage range (VS) 1.6 5.5 V
Quiescent current per channel (IQ) VCM = 0.3 V, IO = 0 480 850 nA
Over temperature 1300
Quiescent current per channel (IQ) VCM = 4.7 V, IO = 0 680 1100
Over temperature 1600

6.8 Typical Characteristics

TA = 25 °C, VS = 5 V, VOUT = VCM = VS/2, RLOAD = 1 MΩ connected to VS/2, and CL = 20 pF, unless otherwise noted.
LPV542 IsVs_LowVcm.png
No Output Load VCM = 0.3 V
Figure 1. Supply Voltage vs Supply Current per Channel,
Low Vcm
LPV542 IsVcm_1p8.png
No Output Load
Figure 3. Supply Current vs
Common Mode at 1.8 V
LPV542 IsVcm_3p3.png
No Output Load
Figure 5. Supply Current vs
Common Mode at 3.3 V
LPV542 Sink_1p8V.png
VS = 1.8 V
Figure 7. Output Sinking Current vs
Output Swing at 1.8 V
LPV542 Sink_2p7V.png
VS = 2.7 V
Figure 9. Output Sinking Current vs
Output Swing at 2.7 V
LPV542 Sink_3p3V.png
VS = 3.3 V
Figure 11. Output Sinking Current vs
Output Swing at 3.3 V
LPV542 Sink_5V.png
VS = 5 V
Figure 13. Output Sinking Current vs
Output Swing at 5 V
LPV542 SHRT_CKT_2GND.png
Output set high (sourcing), shorted to V–
Figure 15. Output Short Circut Current to V- vs
Supply Voltage
LPV542 IB_VCM_1p8_25_GRAF.png
VS = 1.8 V TA = 25°C
Figure 17. Input Bias Current vs
Common Mode Voltage at 1.8 V
LPV542 IB_VCM_5_25_GRAF.png
VS = 5 V TA = 25°C
Figure 19. Input Bias Current vs
Common Mode Voltage at 5V
LPV542 IB_VCM_3p3_85_GRAF.png
VS = 3.3 V TA = 85°C
Figure 21. Input Bias Current vs
Common Mode Voltage at 3.3 V
LPV542 IB_VCM_1p8_125_GRAF.png
VS = 1.8 V TA = 125°C
Figure 23. Input Bias Current vs
Common Mode Voltage at 1.8 V
LPV542 IB_VCM_5_125_GRAF.png
VS = 5 V TA = 125°C CL = 20 pF
Figure 25. Input Bias Current vs
Common Mode Voltage at 5 V
LPV542 PulseResp_1p8V_200mV.png
VS = ±0.9 V RL = 10 MΩ CL = 20 pF
G = +1 VIN = ±100 mV
Figure 27. Pulse Response, 200mVpp at 1.8 V
LPV542 PulseResp_5V_200mV.png
VS = ±2.5 V RL = 10 MΩ CL = 20 pF
G = +1 VIN = ±100 mV
Figure 29. Pulse Response, 200mVpp at 5V
LPV542 AVPH_1p8V_vsTemp_100k.png
VS = 1.8 V RL = 100 kΩ CL = 20 pF
Figure 31. Gain and Phase vs
Temperature at 1.8 V
LPV542 AVPH_1p8V_vsTemp_1M.png
VS = 1.8 V RL = 1 MΩ CL = 20 pF
Figure 33. Gain and Phase vs
Temperature at 1.8 V
LPV542 AVPH_1p8V_vsTemp_10M.png
VS = 1.8 V RL = 10 MΩ CL = 20 pF
Figure 35. Gain and Phase vs
Temperature at 1.8 V
LPV542 IsVs_HiVcm.png
No Output Load VCM = (V+) – 0.3 V
Figure 2. Supply Voltage vs Supply Current per Channel,
High Vcm
LPV542 IsVcm_2p7.png
No Output Load
Figure 4. Supply Current vs
Common Mode at 2.7 V
LPV542 IsVcm_5.png
No Output Load
Figure 6. Supply Current vs
Common Mode at 5 V
LPV542 Source_1p8V.png
VS = 1.8 V
Figure 8. Output Sourcing Current vs
Output Swing at 1.8 V
LPV542 Source_2p7V.png
VS = 2.7 V
Figure 10. Output Sourcing Current vs
Output Swing at 2.7 V
LPV542 Source_3p3V.png
VS = 3.3 V
Figure 12. Output Sourcing Current vs
Output Swing at 3.3 V
LPV542 Source_5V.png
VS = 5 V
Figure 14. Output Sourcing Current vs
Output Swing at 5 V
LPV542 SHRT_CKT_2VS.png
Ouput set low (sinking), shorted to V+
Figure 16. Output Short Circut Current to V+ vs
Supply Voltage
LPV542 IB_VCM_3p3_25_GRAF.png
VS = 3.3 V TA = 25°C
Figure 18. Input Bias Current vs
Common Mode Voltage at 3.3V
LPV542 IB_VCM_1p8_85_GRAF.png
VS = 1.8 V TA = 85°C
Figure 20. Input Bias Current vs
Common Mode Voltage at 1.8V
LPV542 IB_VCM_5_85_GRAF.png
VS = 5 V TA = 85°C
Figure 22. Input Bias Current vs
Common Mode Voltage at 5 V
LPV542 IB_VCM_3p3_125_GRAF.png
VS = 3.3 V TA = 125°C
Figure 24. Input Bias Current vs
Common Mode Voltage at 3.3 V
LPV542 Noise_5V.png
VS = 5 V RL = 100 kΩ CL = 20 pF
Figure 26. Input Referred Voltage Noise
LPV542 PulseResp_1p8V_1V.png
VS = ±0.9 V RL = 10 MΩ CL = 20 pF
G = +1 VIN = ±500mV
Figure 28. Pulse Response, 1Vpp at 1.8V
LPV542 PulseResp_5V_2V.png
VS = ±2.5 V RL = 10 MΩ CL = 20 pF
G = +1 VIN = ±1V
Figure 30. Pulse Response, 2Vpp at 5V
LPV542 AVPH_5V_vsTemp_100k.png
VS = 5 V RL = 100 kΩ CL = 20 pF
Figure 32. Gain and Phase vs
Temperature at 5 V
LPV542 AVPH_5V_vsTemp_1M.png
VS = 5 V RL = 1 MΩ CL = 20 pF
Figure 34. Gain and Phase vs
Temperature at 5 V
LPV542 AVPH_5V_vsTemp_10M.png
VS = 5 V RL = 10 MΩ CL = 20 pF
Figure 36. Gain and Phase vs
Temperature at 5 V
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