The signal integrity of the switch-type based LSF0204-Q1 level translator is dependent on the pull-up resistor and the PCB board parasitic capacitance. Consider the following recommendations when designing with the LSF0204-Q1:

• Minimize the trace length to reduce the parasitic capacitance
• The trace length should be less than half the time of flight to reduce ringing and line reflections or non-monotonic behavior in the switching region
• Minimize stubs on the signal path
• Place the LSF0204-Q1 device near the high voltage side