A high power density, high-efficiency regulator design uses 100-V power MOSFETs in SON 5-mm × 6-mm packages, together with a low-DCR inductor and all-ceramic capacitor design. The design occupies a footprint of 30 mm × 15 mm on a single-sided PCB. The overcurrent (OC) setpoint in this design is set at 12 A based on the resistor R_ILIM and the 10-mΩ R_DS(on) of the low-side MOSFET (typical at T_J = 25°C and V_GS = 10 V). The 12-V output is connected to VCC through a diode, D1, to reduce IC bias power dissipation at high input voltages.

The selected buck converter powertrain components are cited in Table 9-8, including power MOSFETs, buck inductor, input and output capacitors, and ICs. Using the LV5144 Quickstart Calculator, compensation components are selected based on a target loop crossover frequency of 40 kHz and phase margin greater than 55°. The output voltage soft-start time is 6 ms based on the selected soft-start capacitance, C_SS, of 47 nF.

As shown in Figure 9-16, a 2.2-Ω resistor in series with C_BST is used to slow the turn-on transition of the high-side MOSFET, reducing the spike amplitude and ringing of the SW node voltage and minimizing the possibility of Cdv/dt-induced shoot-through of the low-side MOSFET. If needed, place an RC snubber (for example, 2.2 Ω and 100 pF) close to the drain (SW node) and source (PGND) terminals of the low-side MOSFET to further attenuate any SW node voltage overshoot or ringing. Please refer to the application note Reduce Buck Converter EMI and Voltage Stress by Minimizing Inductive Parasitics for more detail.