ZHCSRT4 august 2023 LV5144
PRODUCTION DATA
- 1
- 1 特性
- 2 应用
- 3 说明
- 4 Revision History
- 5 说明（续）
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Input Range (VIN)
- 8.3.2 Output Voltage Setpoint and Accuracy (FB)
- 8.3.3 High-Voltage Bias Supply Regulator (VCC)
- 8.3.4 Precision Enable (EN/UVLO)
- 8.3.5 Power Good Monitor (PGOOD)
- 8.3.6 Switching Frequency (RT, SYNCIN)
- 8.3.7 Configurable Soft Start (SS/TRK)
- 8.3.8 Voltage-Mode Control (COMP)
- 8.3.9 Gate Drivers (LO, HO)
- 8.3.10 Current Sensing and Overcurrent Protection (ILIM)
- 8.3.11 OCP Duty Cycle Limiter
- 8.4 Device Functional Modes
- 9 Application and Implementation
- 10Device and Documentation Support
- 11Mechanical, Packaging, and Orderable Information
9.2.1 Design 1 – 12-A High-Efficiency Synchronous Buck DC/DC Regulator
Figure 9-5 shows the schematic diagram of a 5-V, 12-A buck regulator with a switching frequency of 300 kHz. In this example, the target efficiencies are 94% and 92% at input voltages of 24 V and 48 V, respectively. The input UVLO is set to turn on and off at 8 V and 7 V, respectively. The switching frequency is set by means of a synchronization input signal at 300 kHz, and the free-running switching frequency (in the event that the synchronization signal is removed) is set at 250 kHz by resistor RRT. In terms of control loop performance, the target loop crossover frequency is 40 kHz with a phase margin greater than 50°. The output voltage soft-start time is 6 ms.
Figure 9-5 Application Circuit 1 With LV5144-Q1 48-V to 5-V, 12-A Buck Regulator at 300
kHzThis and subsequent design examples are provided herein to showcase the LV5144 controller in several different applications. Depending on the source impedance of the input supply bus, an electrolytic capacitor can be required at the input to ensure stability, particularly at low input voltage and high output current operating conditions. See Section 9.3 for more detail.