SNOS405B November 1999 – May 2017 MAX660
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
6 Specifications
6.1 Absolute Maximum Ratings
(1)(2)| MIN | MAX | UNIT | |
|---|---|---|---|
| Supply voltage (V+ to GND, or GND to OUT) | 6 | V | |
| LV | (OUT − 0.3 V) | GND + 3 V) | |
| FC, OSC | The least negative of (OUT − 0.3 V)(V+ − 6 V) to (V+ 0.3 V) | ||
| V+ and OUT continuous output current | 120 | mA | |
| Output short-circuit duration to GND(3) | 1 | sec | |
| Power dissipation, TA = 25°C(4) | 735 | mW | |
| TJ, maximum(4) | 150 | °C | |
| Operating junction temperature | −40 | 85 | °C |
| Storage temperature, Tstg | −65 | 150 | °C |
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office/ Distributors for availability and specifications.
(3) OUT may be shorted to GND for one second without damage. However, shorting OUT to V+ may damage the device and must be avoided. Also, for temperatures above 85°C, OUT must not be shorted to GND or V+, or device may be damaged.
6.2 ESD Ratings
| VALUE | UNIT | |||
|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| V+ (supply voltage) | Inverter, LV = open | 3.5 | 5.5 | V | |
| Inverter, LV = GND | 1.5 | 5.5 | |||
| Doubler, LV = out | 2.5 | 5.5 | |||
| Junction temperature (TJ) | –40 | 85 | °C | ||
6.4 Thermal Information
| THERMAL METRIC(1) | MAX660 | UNIT | |
|---|---|---|---|
| SOIC (D) | |||
| 8 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 114.4 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 61.4 | °C/W |
| RθJB | Junction-to-board thermal resistance | 55.5 | °C/W |
| ψJT | Junction-to-top characterization parameter | 9.8 | °C/W |
| ψJB | Junction-to-board characterization parameter | 54.9 | °C/W |
(1) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.
6.5 Electrical Characteristics
Unless otherwise specified: Limits apply for TJ = 25°C, V+ = 5 V, FC = open, C1 = C2 = 150 μF.(1)| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
|---|---|---|---|---|---|---|---|
| V+(3) | Supply voltage | RL = 1 kΩ | Inverter LV = open(2), TJ = –40°C to 85°C |
3.5 | 5.5 | V | |
| Inverter, LV = GND, TJ = –40°C to 85°C |
1.5 | 5.5 | |||||
| Doubler, LV = OUT, TJ = –40°C to 85°C |
2.5 | 5.5 | |||||
| IQ | Supply current | No load, LV = open | FC = open | 0.12 | mA | ||
| FC = open, TJ = –40°C to 85°C |
0.5 | ||||||
| FC = V+ | 1 | ||||||
| FC = V+, TJ = –40°C to 85°C |
3 | ||||||
| IL | Output current | TA ≤ 85°C, OUT ≤ −4 V | 100 | mA | |||
| TA > 85°C, OUT ≤ −3.8 V | 100 | ||||||
| ROUT | Output resistance(3) | IL = 100 mA | TA ≤ 85°C | 6.5 | 10 | Ω | |
| TJ = –40°C to 85°C | 10 | ||||||
| TA > 85°C, TJ = –40°C to 85°C | 12 | ||||||
| ƒOSC | Oscillator frequency | OSC = open | FC = open | 10 | kHz | ||
| FC = open, TJ = –40°C to 85°C | 5 | ||||||
| FC = V+ | 80 | ||||||
| FC = V+, TJ = –40°C to 85°C | 40 | ||||||
| IOSC | OSC input current | FC = open | ±2 | µA | |||
| FC = V+ | ±16 | ||||||
| PEFF | Power efficiency | RL (1 kΩ) between V+ and OUT | 98% | ||||
| RL (1 kΩ) between V+ and OUT TJ = –40°C to 85°C |
96% | ||||||
| RL (500 Ω) between GND and OUT | 96% | ||||||
| RL (500 Ω) between GND and OUT TJ = –40°C to 85°C |
92% | ||||||
| IL = 100 mA to GND | 88% | ||||||
| VOEFF | Voltage conversion efficiency | No load | 99.96% | ||||
| No load, TJ = –40°C to 85°C | 99% | ||||||
(1) In the test circuit, capacitors C1 and C2 are 0.2-Ω maximum ESR capacitors. Capacitors with higher ESR increase output resistance, reduce output voltage, and efficiency.
(2) The minimum limit for this parameter is different from the limit of 3 V for the industry-standard 660 product. For inverter operation with supply voltage below 3.5 V, connect the LV pin to GND.
(3) Specified output resistance includes internal switch resistance and capacitor ESR.
6.6 Typical Characteristics
Circuit of Voltage Inverter and Positive Voltage Doubler.
Figure 1. Supply Current vs Supply Voltage
Figure 3. Output Source Resistance vs Supply Voltage
Figure 7. Efficiency vs Oscillator Frequency
| FC = V+ |
| FC = V+ |
Figure 2. Supply Current vs Oscillator Frequency
Figure 4. Output Source Resistance vs Temperature
Figure 6. Output Voltage Drop vs Load Current
Figure 8. Output Voltage vs Oscillator Frequency
| FC = Open |
| FC = Open |