If the FET temperature exceeds the FET thermal shutdown limit (T_{TSD_FET}), all the FETs are disabled, the charge pump is shut down, and the nFAULT pin is driven low. In addition, the DRIVER_FAULT, OT and OTS bit in the status register are set to 1b. Normal operation resumes (driver operation and the nFAULT pin is released) when the die temperature decreases below the hysteresis point of the thermal shutdown limit (T_{TSD_FET} - T_{TSD_FET_HYS}). The OTS bit stays latched high indicating that a thermal event occurred until a clear fault command is issued through the CLR_FLT bit. This protection feature cannot be disabled.