ZHCS406R August 2010 – September 2018 MSP430F5131 , MSP430F5132 , MSP430F5151 , MSP430F5152 , MSP430F5171 , MSP430F5172
PRODUCTION DATA.
TA0 is a 16-bit timer/counter with three capture/compare registers. TA0 can support multiple capture/compares, PWM outputs, and interval timing (see Table 6-10). TA0 also has extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare registers.
| INPUT PIN NUMBER | DEVICE INPUT SIGNAL | MODULE INPUT SIGNAL | MODULE BLOCK | MODULE OUTPUT SIGNAL | DEVICE OUTPUT SIGNAL | OUTPUT PIN NUMBER | ||||
|---|---|---|---|---|---|---|---|---|---|---|
| RSB
(40-PIN QFN) |
DA
(38-PIN TSSOP) |
YFF
(40-PIN DSBGA) |
RSB
(40-PIN QFN) |
DA
(38-PIN TSSOP) |
YFF
(40-PIN DSBGA) |
|||||
| P3.3 - 30 | P3.3 - 34 | P3.3 - G6 | TA0CLK | TACLK | Timer | NA | NA | – | – | – |
| ACLK (internal) | ACLK | ACLK | ACLK | ACLK | – | – | – | |||
| SMCLK (internal) | SMCLK | SMCLK | SMCLK | SMCLK | – | – | – | |||
| P3.3 - 30 | P3.3 - 34 | P3.3 - G6 | TA0CLK | TACLK | – | – | – | |||
| P3.7 - 36 | – | P3.7 - G4 | TA0.0 | CCI0A | CCR0 | TA0 | TA0.0 | P3.7 - 36 | – | P3.7 - G4 |
| – | – | – | CBOUT | CCI0B | – | – | – | |||
| – | – | – | VSS | GND | – | – | – | |||
| – | – | – | VCC | VCC | – | – | – | |||
| P3.6 - 35 | – | P3.6 - G3 | TA0.1 | CCI1A | CCR1 | TA1 | TA0.1 | P3.6 - 35 | P3.6 - 38 | P3.6 - G3 |
| – | – | – | ACLK | CCI1B | ADC10_A(1) (internal) ADC10SHSx = 001b | ADC10_A(1) (internal) ADC10SHSx = 001b | ADC10_A(1) (internal) ADC10SHSx = 001b | |||
| – | – | – | VSS | GND | – | – | – | |||
| – | – | – | VCC | VCC | – | – | – | |||
| P3.5 - 34 | P3.5 - 37 | P3.5 - F3 | TA0.2 | CCI2A | CCR2 | TA2 | TA0.2 | P3.5 - 34 | P3.5 - 37 | P3.5 - F3 |
| – | – | – | VSS | CCI2B | – | – | – | |||
| – | – | – | VSS | GND | – | – | – | |||
| – | – | – | VCC | VCC | – | – | – | |||