米6体育平台手机版

ZHCSER1B September 2013 – September 2018 MSP430F5232 , MSP430F5234 , MSP430F5237 , MSP430F5239 , MSP430F5242 , MSP430F5244 , MSP430F5247 , MSP430F5249

PRODUCTION DATA.

封装选项

机械数据 (封装 | 引脚)

RGZ|48
- MPQF123F

散热焊盘机械数据 (封装 | 引脚)

RGZ|48
- QFND031W

订购信息

6.9.14 TB0 (Link to User's Guide)

TB0 is a 16-bit timer/counter (Timer_B type) with seven capture/compare registers. TB0 can support multiple captures and compares, PWM outputs, and interval timing (see Table 6-13). TB0 also has extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare registers.

Table 6-13 TB0 Signal Connections

INPUT PIN NUMBER		DEVICE INPUT SIGNAL	MODULE INPUT SIGNAL	MODULE BLOCK	MODULE OUTPUT SIGNAL	DEVICE OUTPUT SIGNAL	OUTPUT PIN NUMBER
RGC, ZQE	RGZ	DEVICE INPUT SIGNAL	MODULE INPUT SIGNAL	MODULE BLOCK	MODULE OUTPUT SIGNAL	DEVICE OUTPUT SIGNAL	RGC, ZQE	RGZ
⁽¹⁾	⁽¹⁾	TB0CLK	TBCLK	Timer	NA	NA
		ACLK (internal)	ACLK
		SMCLK (internal)	SMCLK
⁽¹⁾	⁽¹⁾	TB0CLK	TBCLK
49, B8(9)-P7.0⁽¹⁾	⁽¹⁾	TB0.0	CCI0A	CCR0	TB0	TB0.0	49, B8(9)-P7.0⁽¹⁾	⁽¹⁾
49, B8(9)-P7.0⁽¹⁾	⁽¹⁾	TB0.0	CCI0B				ADC10 (internal) ADC10SHSx = {2}	ADC10 (internal) ADC10SHSx = {2}
		DV_SS	GND
		DV_CC	V_CC
50, A9-P7.1⁽¹⁾	⁽¹⁾	TB0.1	CCI1A	CCR1	TB1	TB0.1	50, A9-P7.1⁽¹⁾	⁽¹⁾
		CBOUT (internal)	CCI1B				ADC10 (internal) ADC10SHSx = {3}	ADC10 (internal) ADC10SHSx = {3}
		DV_SS	GND
		DV_CC	V_CC
51, B7-P7.2⁽¹⁾	⁽¹⁾	TB0.2	CCI2A	CCR2	TB2	TB0.2	51, B7-P7.2⁽¹⁾	⁽¹⁾
51, B7-P7.2⁽¹⁾	⁽¹⁾	TB0.2	CCI2B
		DV_SS	GND
		DV_CC	V_CC
52, A8-P7.3⁽¹⁾	⁽¹⁾	TB0.3	CCI3A	CCR3	TB3	TB0.3	52, A8-P7.3⁽¹⁾	⁽¹⁾
52, A8-P7.3⁽¹⁾	⁽¹⁾	TB0.3	CCI3B
		DV_SS	GND
		DV_CC	V_CC
53, A7-P7.4⁽¹⁾	⁽¹⁾	TB0.4	CCI4A	CCR4	TB4	TB0.4	53, A7-P7.4⁽¹⁾	⁽¹⁾
53, A7-P7.4⁽¹⁾	⁽¹⁾	TB0.4	CCI4B
		DV_SS	GND
		DV_CC	V_CC
54, A6-P7.5⁽¹⁾	⁽¹⁾	TB0.5	CCI5A	CCR5	TB5	TB0.5	54, A6-P7.5⁽¹⁾	⁽¹⁾
54, A6-P7.5⁽¹⁾	⁽¹⁾	TB0.5	CCI5B
		DV_SS	GND
		DV_CC	V_CC
⁽¹⁾	⁽¹⁾	TB0.6	CCI6A	CCR6	TB6	TB0.6	⁽¹⁾	⁽¹⁾
		ACLK (internal)	CCI6B
		DV_SS	GND
		DV_CC	V_CC

(1) Timer functions are available through the port mapping controller.