ZHCSIR7N March   2009  – September 2018 MSP430F5513 , MSP430F5514 , MSP430F5515 , MSP430F5517 , MSP430F5519 , MSP430F5521 , MSP430F5522 , MSP430F5524 , MSP430F5525 , MSP430F5526 , MSP430F5527 , MSP430F5528 , MSP430F5529

PRODUCTION DATA.  

  1. 1器件概述
    1. 1.1 特性
    2. 1.2 应用范围
    3. 1.3 说明
    4. 1.4 功能方框图
  2. 2修订历史记录
  3. 3Device Comparison
    1. 3.1 Related Products
  4. 4Terminal Configuration and Functions
    1. 4.1 Pin Diagrams
    2. 4.2 Signal Descriptions
      1. Table 4-1 Terminal Functions
  5. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Active Mode Supply Current Into VCC Excluding External Current
    5. 5.5  Low-Power Mode Supply Currents (Into VCC) Excluding External Current
    6. 5.6  Thermal Resistance Characteristics
    7. 5.7  Schmitt-Trigger Inputs – General-Purpose I/O (P1.0 to P1.7, P2.0 to P2.7, P3.0 to P3.7, P4.0 to P4.7, P5.0 to P5.7, P6.0 to P6.7, P7.0 to P7.7, P8.0 to P8.2, PJ.0 to PJ.3, RST/NMI)
    8. 5.8  Inputs – Ports P1 and P2 (P1.0 to P1.7, P2.0 to P2.7)
    9. 5.9  Leakage Current – General-Purpose I/O (P1.0 to P1.7, P2.0 to P2.7, P3.0 to P3.7, P4.0 to P4.7) (P5.0 to P5.7, P6.0 to P6.7, P7.0 to P7.7, P8.0 to P8.2, PJ.0 to PJ.3, RST/NMI)
    10. 5.10 Outputs – General-Purpose I/O (Full Drive Strength) (P1.0 to P1.7, P2.0 to P2.7, P3.0 to P3.7, P4.0 to P4.7, P5.0 to P5.7, P6.0 to P6.7, P7.0 to P7.7, P8.0 to P8.2, PJ.0 to PJ.3)
    11. 5.11 Outputs – General-Purpose I/O (Reduced Drive Strength) (P1.0 to P1.7, P2.0 to P2.7, P3.0 to P3.7, P4.0 to P4.7, P5.0 to P5.7, P6.0 to P6.7, P7.0 to P7.7, P8.0 to P8.2, PJ.0 to PJ.3)
    12. 5.12 Output Frequency – General-Purpose I/O (P1.0 to P1.7, P2.0 to P2.7, P3.0 to P3.7, P4.0 to P4.7, P5.0 to P5.7, P6.0 to P6.7, P7.0 to P7.7, P8.0 to P8.2, PJ.0 to PJ.3)
    13. 5.13 Typical Characteristics – Outputs, Reduced Drive Strength (PxDS.y = 0)
    14. 5.14 Typical Characteristics – Outputs, Full Drive Strength (PxDS.y = 1)
    15. 5.15 Crystal Oscillator, XT1, Low-Frequency Mode
    16. 5.16 Crystal Oscillator, XT2
    17. 5.17 Internal Very-Low-Power Low-Frequency Oscillator (VLO)
    18. 5.18 Internal Reference, Low-Frequency Oscillator (REFO)
    19. 5.19 DCO Frequency
    20. 5.20 PMM, Brownout Reset (BOR)
    21. 5.21 PMM, Core Voltage
    22. 5.22 PMM, SVS High Side
    23. 5.23 PMM, SVM High Side
    24. 5.24 PMM, SVS Low Side
    25. 5.25 PMM, SVM Low Side
    26. 5.26 Wake-up Times From Low-Power Modes and Reset
    27. 5.27 Timer_A
    28. 5.28 Timer_B
    29. 5.29 USCI (UART Mode) Clock Frequency
    30. 5.30 USCI (UART Mode)
    31. 5.31 USCI (SPI Master Mode) Clock Frequency
    32. 5.32 USCI (SPI Master Mode)
    33. 5.33 USCI (SPI Slave Mode)
    34. 5.34 USCI (I2C Mode)
    35. 5.35 12-Bit ADC, Power Supply and Input Range Conditions
    36. 5.36 12-Bit ADC, Timing Parameters
    37. 5.37 12-Bit ADC, Linearity Parameters Using an External Reference Voltage or AVCC as Reference Voltage
    38. 5.38 12-Bit ADC, Linearity Parameters Using the Internal Reference Voltage
    39. 5.39 12-Bit ADC, Temperature Sensor and Built-In VMID
    40. 5.40 REF, External Reference
    41. 5.41 REF, Built-In Reference
    42. 5.42 Comparator_B
    43. 5.43 Ports PU.0 and PU.1
    44. 5.44 USB Output Ports DP and DM
    45. 5.45 USB Input Ports DP and DM
    46. 5.46 USB-PWR (USB Power System)
    47. 5.47 USB-PLL (USB Phase-Locked Loop)
    48. 5.48 Flash Memory
    49. 5.49 JTAG and Spy-Bi-Wire Interface
  6. 6Detailed Description
    1. 6.1  CPU (Link to User's Guide)
    2. 6.2  Operating Modes
    3. 6.3  Interrupt Vector Addresses
    4. 6.4  Memory Organization
    5. 6.5  Bootloader (BSL)
      1. 6.5.1 USB BSL
      2. 6.5.2 UART BSL
    6. 6.6  JTAG Operation
      1. 6.6.1 JTAG Standard Interface
      2. 6.6.2 Spy-Bi-Wire Interface
    7. 6.7  Flash Memory (Link to User's Guide)
    8. 6.8  RAM (Link to User's Guide)
    9. 6.9  Peripherals
      1. 6.9.1  Digital I/O (Link to User's Guide)
      2. 6.9.2  Port Mapping Controller (Link to User's Guide)
      3. 6.9.3  Oscillator and System Clock (Link to User's Guide)
      4. 6.9.4  Power-Management Module (PMM) (Link to User's Guide)
      5. 6.9.5  Hardware Multiplier (Link to User's Guide)
      6. 6.9.6  Real-Time Clock (RTC_A) (Link to User's Guide)
      7. 6.9.7  Watchdog Timer (WDT_A) (Link to User's Guide)
      8. 6.9.8  System Module (SYS) (Link to User's Guide)
      9. 6.9.9  DMA Controller (Link to User's Guide)
      10. 6.9.10 Universal Serial Communication Interface (USCI) (Links to User's Guide: UART Mode, SPI Mode, I2C Mode)
      11. 6.9.11 TA0 (Link to User's Guide)
      12. 6.9.12 TA1 (Link to User's Guide)
      13. 6.9.13 TA2 (Link to User's Guide)
      14. 6.9.14 TB0 (Link to User's Guide)
      15. 6.9.15 Comparator_B (Link to User's Guide)
      16. 6.9.16 ADC12_A (Link to User's Guide)
      17. 6.9.17 CRC16 (Link to User's Guide)
      18. 6.9.18 Voltage Reference (REF) Module (Link to User's Guide)
      19. 6.9.19 Universal Serial Bus (USB) (Link to User's Guide)
      20. 6.9.20 Embedded Emulation Module (EEM) (Link to User's Guide)
      21. 6.9.21 Peripheral File Map
    10. 6.10 Input/Output Diagrams
      1. 6.10.1  Port P1 (P1.0 to P1.7) Input/Output With Schmitt Trigger
      2. 6.10.2  Port P2 (P2.0 to P2.7) Input/Output With Schmitt Trigger
      3. 6.10.3  Port P3 (P3.0 to P3.7) Input/Output With Schmitt Trigger
      4. 6.10.4  Port P4 (P4.0 to P4.7) Input/Output With Schmitt Trigger
      5. 6.10.5  Port P5 (P5.0 and P5.1) Input/Output With Schmitt Trigger
      6. 6.10.6  Port P5 (P5.2 and P5.3) Input/Output With Schmitt Trigger
      7. 6.10.7  Port P5 (P5.4 and P5.5) Input/Output With Schmitt Trigger
      8. 6.10.8  Port P5 (P5.6 and P5.7) Input/Output With Schmitt Trigger
      9. 6.10.9  Port P6 (P6.0 to P6.7) Input/Output With Schmitt Trigger
      10. 6.10.10 Port P7 (P7.0 to P7.3) Input/Output With Schmitt Trigger
      11. 6.10.11 Port P7 (P7.4 to P7.7) Input/Output With Schmitt Trigger
      12. 6.10.12 Port P8 (P8.0 to P8.2) Input/Output With Schmitt Trigger
      13. 6.10.13 Port PU (PU.0/DP, PU.1/DM, PUR) USB Ports
      14. 6.10.14 Port PJ (PJ.0) JTAG Pin TDO, Input/Output With Schmitt Trigger or Output
      15. 6.10.15 Port PJ (PJ.1 to PJ.3) JTAG Pins TMS, TCK, TDI/TCLK, Input/Output With Schmitt Trigger or Output
    11. 6.11 Device Descriptors (TLV)
  7. 7器件和文档支持
    1. 7.1  入门和后续步骤
    2. 7.2  Device Nomenclature
    3. 7.3  工具与软件
    4. 7.4  文档支持
    5. 7.5  相关链接
    6. 7.6  社区资源
    7. 7.7  商标
    8. 7.8  静电放电警告
    9. 7.9  Export Control Notice
    10. 7.10 Glossary
  8. 8机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6.4 Memory Organization

Table 6-2 summarizes the memory map of the devices.

Table 6-2 Memory Organization(1)

MSP430F5522
MSP430F5521
MSP430F5513		 MSP430F5525
MSP430F5524
MSP430F5515
MSP430F5514		 MSP430F5527
MSP430F5526
MSP430F5517		 MSP430F5529
MSP430F5528
MSP430F5519
Memory (flash)
Main: interrupt vector		 Total Size 32KB
00FFFFh to 00FF80h		 64KB
00FFFFh to 00FF80h		 96KB
00FFFFh to 00FF80h		 128KB
00FFFFh to 00FF80h
Main: code memory Bank D N/A N/A N/A 32KB
0243FFh to 01C400h
Bank C N/A N/A 32KB
01C3FFh to 014400h		 32KB
01C3FFh to 014400h
Bank B 15KB
00FFFFh to 00C400h		 32KB
0143FFh to 00C400h		 32KB
0143FFh to 00C400h		 32KB
0143FFh to 00C400h
Bank A 17KB
00C3FFh to 008000h		 32KB
00C3FFh to 004400h		 32KB
00C3FFh to 004400h		 32KB
00C3FFh to 004400h
RAM Sector 3 2KB(3)
0043FFh to 003C00h		 N/A N/A 2KB
0043FFh to 003C00h
Sector 2 2KB(4)
003BFFh to 003400h		 N/A 2KB
003BFFh to 003400h		 2KB
003BFFh to 003400h
Sector 1 2KB
0033FFh to 002C00h		 2KB
0033FFh to 002C00h		 2KB
0033FFh to 002C00h		 2KB
0033FFh to 002C00h
Sector 0 2KB
002BFFh to 002400h		 2KB
002BFFh to 002400h		 2KB
002BFFh to 002400h		 2KB
002BFFh to 002400h
USB RAM(2) Sector 7 2KB
0023FFh to 001C00h		 2KB
0023FFh to 001C00h		 2KB
0023FFh to 001C00h		 2KB
0023FFh to 001C00h
Information memory (flash) Info A 128 B
0019FFh to 001980h		 128 B
0019FFh to 001980h		 128 B
0019FFh to 001980h		 128 B
0019FFh to 001980h
Info B 128 B
00197Fh to 001900h		 128 B
00197Fh to 001900h		 128 B
00197Fh to 001900h		 128 B
00197Fh to 001900h
Info C 128 B
0018FFh to 001880h		 128 B
0018FFh to 001880h		 128 B
0018FFh to 001880h		 128 B
0018FFh to 001880h
Info D 128 B
00187Fh to 001800h		 128 B
00187Fh to 001800h		 128 B
00187Fh to 001800h		 128 B
00187Fh to 001800h
Bootloader (BSL) memory (flash) BSL 3 512 B
0017FFh to 001600h		 512 B
0017FFh to 001600h		 512 B
0017FFh to 001600h		 512 B
0017FFh to 001600h
BSL 2 512 B
0015FFh to 001400h		 512 B
0015FFh to 001400h		 512 B
0015FFh to 001400h		 512 B
0015FFh to 001400h
BSL 1 512 B
0013FFh to 001200h		 512 B
0013FFh to 001200h		 512 B
0013FFh to 001200h		 512 B
0013FFh to 001200h
BSL 0 512 B
0011FFh to 001000h		 512 B
0011FFh to 001000h		 512 B
0011FFh to 001000h		 512 B
0011FFh to 001000h
Peripherals Size 4KB
000FFFh to 0h		 4KB
000FFFh to 0h		 4KB
000FFFh to 0h		 4KB
000FFFh to 0h
(1) N/A = Not available
(2) USB RAM can be used as general purpose RAM when not used for USB operation.
(3) MSP430F5522 only
(4) MSP430F5522 and MSP430F5521 only
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