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ZHCS409G June 2010 – September 2020 MSP430F6630 , MSP430F6631 , MSP430F6632 , MSP430F6633 , MSP430F6634 , MSP430F6635 , MSP430F6636 , MSP430F6637 , MSP430F6638

PRODUCTION DATA

封装选项

机械数据 (封装 | 引脚)

ZQW|113
- MPBG674
ZCA|113
- MPBGAJ3A
PZ|100
- MTQF013A

散热焊盘机械数据 (封装 | 引脚)

PZ|100
- QFND428

订购信息

8.39 12-Bit ADC, Linearity Parameters Using an External Reference Voltage

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER		TEST CONDITIONS	V_CC	TYP	MAX	UNIT
E_I	Integral linearity error⁽²⁾	1.4 V ≤ dVREF ≤ 1.6 V⁽¹⁾	2.2 V, 3 V		±2	LSB
E_I	Integral linearity error⁽²⁾	1.6 V < dVREF ⁽¹⁾	2.2 V, 3 V		±1.7	LSB
E_D	Differential linearity error⁽²⁾	See ⁽¹⁾	2.2 V, 3 V		±1	LSB
E_O	Offset error⁽³⁾	dVREF ≤ 2.2 V⁽¹⁾	2.2 V, 3 V	±3	±5.6	LSB
E_O	Offset error⁽³⁾	dVREF > 2.2 V⁽¹⁾	2.2 V, 3 V	±1.5	±3.5	LSB
E_G	Gain error⁽³⁾	See ⁽¹⁾	2.2 V, 3 V	±1	±2.5	LSB
E_T	Total unadjusted error	dVREF ≤ 2.2 V⁽¹⁾	2.2 V, 3 V	±3.5	±7.1	LSB
E_T	Total unadjusted error	dVREF > 2.2 V⁽¹⁾	2.2 V, 3 V	±2	±5	LSB

(1) The external reference voltage is selected by: SREF2 = 0 or 1, SREF1 = 1, SREF0 = 0. dVREF = V_R+ - V_R-. V_R+ < AVCC. V_R- > AVSS. Unless otherwise mentioned, dVREF > 1.5 V. Impedance of the external reference voltage R < 100 Ω, and two decoupling capacitors, 10 µF and 100 nF, should be connected to VREF+/VREF- to decouple the dynamic current. See also the MSP430F5xx and MSP430F6xx Family User's Guide.

(2) Parameters are derived using the histogram method.

(3) Parameters are derived using a best fit curve.