米6体育平台手机版

ZHCS409G June 2010 – September 2020 MSP430F6630 , MSP430F6631 , MSP430F6632 , MSP430F6633 , MSP430F6634 , MSP430F6635 , MSP430F6636 , MSP430F6637 , MSP430F6638

PRODUCTION DATA

封装选项

机械数据 (封装 | 引脚)

ZQW|113
- MPBG674
ZCA|113
- MPBGAJ3A
PZ|100
- MTQF013A

散热焊盘机械数据 (封装 | 引脚)

PZ|100
- QFND428

订购信息

8.58 JTAG and Spy-Bi-Wire Interface

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
f_SBW	Spy-Bi-Wire input frequency	2.2 V, 3 V	0		20	MHz
t_SBW,Low	Spy-Bi-Wire low clock pulse duration	2.2 V, 3 V	0.025		15	µs
t_{SBW, En}	Spy-Bi-Wire enable time (TEST high to acceptance of first clock edge)⁽¹⁾	2.2 V, 3 V			1	µs
t_SBW,Rst	Spy-Bi-Wire return to normal operation time		15		100	µs
f_TCK	TCK input frequency (4-wire JTAG)⁽²⁾	2.2 V	0		5	MHz
f_TCK	TCK input frequency (4-wire JTAG)⁽²⁾	3 V	0		10	MHz
R_internal	Internal pulldown resistance on TEST	2.2 V, 3 V	45	60	80	kΩ

(1) Tools that access the Spy-Bi-Wire interface must wait for the t_SBW,En time after pulling the TEST/SBWTCK pin high before applying the first SBWTCK clock edge.

(2) f_TCK may be restricted to meet the timing requirements of the module selected.