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ZHCSDE8A February 2015 – October 2018 MSP430F67621A , MSP430F67641A

PRODUCTION DATA.

封装选项

机械数据 (封装 | 引脚)

PN|80
- MTQF010B
PZ|100
- MTQF013A

散热焊盘机械数据 (封装 | 引脚)

订购信息

3 Device Comparison

Table 3-1 summarizes the available family members.

Table 3-1 Device Comparison⁽¹⁾⁽²⁾

DEVICE	FLASH (KB)	SRAM (KB)	SD24_B CONVERTERS	ADC10_A CHANNELS	Timer_A⁽³⁾	eUSCI		I/Os	PACKAGE
DEVICE	FLASH (KB)	SRAM (KB)	SD24_B CONVERTERS	ADC10_A CHANNELS	Timer_A⁽³⁾	CHANNEL A: UART, IrDA, SPI	CHANNEL B: SPI, I²C	I/Os	PACKAGE
MSP430F67641A	128	8	3	6 ext, 2 int	3, 2, 2, 2	3	1	72	100 PZ
MSP430F67641A	128	8	3	6 ext, 2 int	3, 2, 2, 2	3	1	52	80 PN
MSP430F67621A	64	4	3	6 ext, 2 int	3, 2, 2, 2	3	1	72	100 PZ
MSP430F67621A	64	4	3	6 ext, 2 int	3, 2, 2, 2	3	1	52	80 PN

(1) For the most current package and ordering information, see the Package Option Addendum in Section 9, or see the TI website at www.ti.com.

(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

(3) Each number in the sequence represents an instantiation of Timer_A with its associated number of capture compare registers and PWM output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_A, the first instantiation having 3 and the second instantiation having 5 capture compare registers and PWM output generators, respectively.