ZHCSAU6D November 2012 – September 2018 MSP430F67451 , MSP430F67461 , MSP430F67471 , MSP430F67481 , MSP430F67491 , MSP430F67651 , MSP430F67661 , MSP430F67671 , MSP430F67681 , MSP430F67691 , MSP430F67751 , MSP430F67761 , MSP430F67771 , MSP430F67781 , MSP430F67791
PRODUCTION DATA.
PARAMETER | TEST CONDITIONS | VCC | MIN | MAX | UNIT | |
---|---|---|---|---|---|---|
tSTE,LEAD | STE lead time, STE low to clock | 2 V | 4 | ns | ||
3 V | 3 | |||||
tSTE,LAG | STE lag time, Last clock to STE high | 2 V | 0 | ns | ||
3 V | 0 | |||||
tSTE,ACC | STE access time, STE low to SOMI data out | 2 V | 46 | ns | ||
3 V | 24 | |||||
tSTE,DIS | STE disable time, STE high to SOMI high impedance | 2 V | 38 | ns | ||
3 V | 25 | |||||
tSU,SI | SIMO input data setup time | 2 V | 2 | ns | ||
3 V | 1 | |||||
tHD,SI | SIMO input data hold time | 2 V | 2 | ns | ||
3 V | 2 | |||||
tVALID,SO | SOMI output data valid time(2) | UCLK edge to SOMI valid,
CL = 20 pF |
2 V | 55 | ns | |
3 V | 32 | |||||
tHD,SO | SOMI output data hold time(3) | CL = 20 pF | 2 V | 24 | ns | |
3 V | 16 |