ZHCSCI3A May   2014  – September 2018 MSP430F67451A , MSP430F67461A , MSP430F67471A , MSP430F67481A , MSP430F67491A , MSP430F67651A , MSP430F67661A , MSP430F67671A , MSP430F67681A , MSP430F67691A , MSP430F67751A , MSP430F67761A , MSP430F67771A , MSP430F67781A , MSP430F67791A

PRODUCTION DATA.  

  1. 1器件概述
    1. 1.1 特性
    2. 1.2 应用
    3. 1.3 说明
    4. 1.4 应用图
  2. 2修订历史记录
  3. 3Device Comparison
    1. 3.1 Related Products
  4. 4Terminal Configuration and Functions
    1. 4.1 Pin Diagrams
    2. 4.2 Signal Descriptions
      1. Table 4-3 Terminal Functions – PEU Package
      2. Table 4-4 Terminal Functions – PZ Package
    3. 4.3 Pin Multiplexing
    4. 4.4 Connection of Unused Pins
  5. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Active Mode Supply Current Into VCC Excluding External Current
    5. 5.5  Low-Power Mode Supply Currents (Into VCC) Excluding External Current
    6. 5.6  Low-Power Mode With LCD Supply Currents (Into VCC) Excluding External Current
    7. 5.7  Thermal Resistance Characteristics
    8. 5.8  Timing and Switching Characteristics
      1. 5.8.1 Reset Timing
        1. Table 5-1 Wake-up Times From Low-Power Modes and Reset
      2. 5.8.2 Clock Specifications
        1. Table 5-2 Crystal Oscillator, XT1, Low-Frequency Mode
        2. Table 5-3 Internal Very-Low-Power Low-Frequency Oscillator (VLO)
        3. Table 5-4 Internal Reference, Low-Frequency Oscillator (REFO)
        4. Table 5-5 DCO Frequency
    9. 5.9  Digital I/Os
      1. Table 5-6  Schmitt-Trigger Inputs – General-Purpose I/O
      2. Table 5-7  Inputs – Ports P1 and P2
      3. Table 5-8  Leakage Current – General-Purpose I/O
      4. Table 5-9  Outputs – General-Purpose I/O (Full Drive Strength)
      5. Table 5-10 Outputs – General-Purpose I/O (Reduced Drive Strength)
      6. Table 5-11 Output Frequency – General-Purpose I/O
      7. 5.9.1      Typical Characteristics – Outputs, Reduced Drive Strength (PxDS.y = 0)
      8. 5.9.2      Typical Characteristics – Outputs, Full Drive Strength (PxDS.y = 1)
    10. 5.10 Power-Management Module (PMM)
      1. Table 5-12 PMM, Brownout Reset (BOR)
      2. Table 5-13 PMM, Core Voltage
      3. Table 5-14 PMM, SVS High Side
      4. Table 5-15 PMM, SVM High Side
      5. Table 5-16 PMM, SVS Low Side
      6. Table 5-17 PMM, SVM Low Side
    11. 5.11 Auxiliary Supplies
      1. Table 5-18 Auxiliary Supplies, Recommended Operating Conditions
      2. Table 5-19 Auxiliary Supplies, AUXVCC3 (Backup Subsystem) Currents
      3. Table 5-20 Auxiliary Supplies, Auxiliary Supply Monitor
      4. Table 5-21 Auxiliary Supplies, Switch ON-Resistance
      5. Table 5-22 Auxiliary Supplies, Switching Time
      6. Table 5-23 Auxiliary Supplies, Switch Leakage
      7. Table 5-24 Auxiliary Supplies, Auxiliary Supplies to ADC10_A
      8. Table 5-25 Auxiliary Supplies, Charge Limiting Resistor
    12. 5.12 Timer_A
      1. Table 5-26 Timer_A
    13. 5.13 eUSCI
      1. Table 5-27 eUSCI (UART Mode) Clock Frequency
      2. Table 5-28 eUSCI (UART Mode) Switching Characteristics
      3. Table 5-29 eUSCI (SPI Master Mode) Clock Frequency
      4. Table 5-30 eUSCI (SPI Master Mode) Switching Characteristics
      5. Table 5-31 eUSCI (SPI Slave Mode)
      6. Table 5-32 eUSCI (I2C Mode) Switching Characteristics
    14. 5.14 RTC Tamper Detect Pin
      1. Table 5-33 Schmitt-Trigger Inputs, RTC Tamper Detect Pin
      2. Table 5-34 Inputs, RTC Tamper Detect Pin
      3. Table 5-35 Leakage Current, RTC Tamper Detect Pin
      4. Table 5-36 Outputs, RTC Tamper Detect Pin
    15. 5.15 LCD_C
      1. Table 5-37 LCD_C, Operating Conditions
      2. Table 5-38 LCD_C, Electrical Characteristics
    16. 5.16 SD24_B
      1. Table 5-39 SD24_B, Power Supply and Operating Conditions
      2. Table 5-40 SD24_B, Analog Inputs
      3. Table 5-41 SD24_B, Supply Currents
      4. Table 5-42 SD24_B, Performance
      5. Table 5-43 SD24_B, AC Performance
      6. Table 5-44 SD24_B, AC Performance
      7. Table 5-45 SD24_B, AC Performance
      8. Table 5-46 SD24_B External Reference Input
    17. 5.17 ADC10_A
      1. Table 5-47 10-Bit ADC, Power Supply and Input Range Conditions
      2. Table 5-48 10-Bit ADC, Switching Characteristics
      3. Table 5-49 10-Bit ADC, Linearity Parameters
      4. Table 5-50 10-Bit ADC, External Reference
    18. 5.18 REF
      1. Table 5-51 REF Built-In Reference
    19. 5.19 Comparator_B
      1. Table 5-52 Comparator_B
    20. 5.20 Flash
      1. Table 5-53 Flash Memory
    21. 5.21 Emulation and Debug
      1. Table 5-54 JTAG and Spy-Bi-Wire (SBW) Interface
  6. 6Detailed Description
    1. 6.1  Overview
    2. 6.2  Functional Block Diagrams
    3. 6.3  CPU (Link to User's Guide)
    4. 6.4  Instruction Set
    5. 6.5  Operating Modes
    6. 6.6  Interrupt Vector Addresses
    7. 6.7  Special Function Registers (SFRs)
      1. Table 6-4 Interrupt Enable 1 Register Description
      2. Table 6-5 Interrupt Flag 1 Register Description
    8. 6.8  Bootloader (BSL)
    9. 6.9  JTAG Operation
      1. 6.9.1 JTAG Standard Interface
      2. 6.9.2 Spy-Bi-Wire Interface
    10. 6.10 Memory
      1. 6.10.1 Memory Organization
      2. 6.10.2 Flash Memory (Link to User's Guide)
      3. 6.10.3 RAM (Link to User's Guide)
      4. 6.10.4 Backup RAM (Link to User's Guide)
    11. 6.11 Peripherals
      1. 6.11.1  Oscillator and System Clock (Link to User's Guide)
      2. 6.11.2  Power-Management Module (PMM) (Link to User's Guide)
      3. 6.11.3  Auxiliary-Supply System (Link to User's Guide)
      4. 6.11.4  Backup Subsystem
      5. 6.11.5  Digital I/O (Link to User's Guide)
      6. 6.11.6  Port Mapping Controller (Link to User's Guide)
      7. 6.11.7  System Module (SYS) (Link to User's Guide)
      8. 6.11.8  Watchdog Timer (WDT_A) (Link to User's Guide)
      9. 6.11.9  DMA Controller (Link to User's Guide)
      10. 6.11.10 CRC16 (Link to User's Guide)
      11. 6.11.11 Hardware Multiplier (Link to User's Guide)
      12. 6.11.12 Enhanced Universal Serial Communication Interface (eUSCI) (Links to User's Guide: UART Mode, SPI Mode, I2C Mode)
      13. 6.11.13 ADC10_A (Link to User's Guide)
      14. 6.11.14 SD24_B (Link to User's Guide)
      15. 6.11.15 TA0 (Link to User's Guide)
      16. 6.11.16 TA1 (Link to User's Guide)
      17. 6.11.17 TA2 (Link to User's Guide)
      18. 6.11.18 TA3 (Link to User's Guide)
      19. 6.11.19 SD24_B Triggers
      20. 6.11.20 ADC10_A Triggers
      21. 6.11.21 Real-Time Clock (RTC_C) (Link to User's Guide)
      22. 6.11.22 Reference (REF) Module Voltage Reference (Link to User's Guide)
      23. 6.11.23 LCD_C (Link to User's Guide)
      24. 6.11.24 Comparator_B (Link to User's Guide)
      25. 6.11.25 Embedded Emulation Module (EEM) (Link to User's Guide)
      26. 6.11.26 Peripheral File Map
    12. 6.12 Input/Output Diagrams
      1. 6.12.1  Port P1 (P1.0 to P1.3) Input/Output With Schmitt Trigger (PEU Package Only)
      2. 6.12.2  Port P1 (P1.0 to P1.3) Input/Output With Schmitt Trigger (PZ Package Only)
      3. 6.12.3  Port P1 (P1.4 and P1.5) Input/Output With Schmitt Trigger
      4. 6.12.4  Port P1 (P1.6 and P1.7) Input/Output With Schmitt Trigger
      5. 6.12.5  Port P2 (P2.0 to P2.7) Input/Output With Schmitt Trigger (PEU Package Only)
      6. 6.12.6  Port P2 (P2.0 to P2.3) Input/Output With Schmitt Trigger (PZ Package Only)
      7. 6.12.7  Port P2 (P2.4 to P2.6) Input/Output With Schmitt Trigger (PZ Package Only)
      8. 6.12.8  Port P2 (P2.7) Input/Output With Schmitt Trigger (PZ Package Only)
      9. 6.12.9  Ports P3 (P3.0 to P3.7) Input/Output With Schmitt Trigger (PEU Package Only)
      10. 6.12.10 Ports P3 (P3.0) Input/Output With Schmitt Trigger (PZ Package Only)
      11. 6.12.11 Ports P3 (P3.1 to P3.7) Input/Output With Schmitt Trigger (PZ Package Only)
      12. 6.12.12 Port P4 (P4.0 to P4.7) Input/Output With Schmitt Trigger (PEU Package Only)
      13. 6.12.13 Port P4 (P4.0 to P4.7) Input/Output With Schmitt Trigger (PZ Package Only)
      14. 6.12.14 Port P5 (P5.0 to P5.3) Input/Output With Schmitt Trigger (PEU Package Only)
      15. 6.12.15 Port P5 (P5.4 to P5.6) Input/Output With Schmitt Trigger (PEU Package Only)
      16. 6.12.16 Port P5 (P5.7) Input/Output With Schmitt Trigger (PEU Package Only)
      17. 6.12.17 Port P5 (P5.0 to P5.7) Input/Output With Schmitt Trigger (PZ Package Only)
      18. 6.12.18 Port P6 (P6.0) Input/Output With Schmitt Trigger (PEU Package Only)
      19. 6.12.19 Port P6 (P6.1 to P6.3) Input/Output With Schmitt Trigger (PEU Package Only)
      20. 6.12.20 Port P6 (P6.4 to P6.7) Input/Output With Schmitt Trigger (PEU Package Only)
      21. 6.12.21 Port P6 (P6.0 to P6.7) Input/Output With Schmitt Trigger (PZ Package Only)
      22. 6.12.22 Port P7 (P7.0 to P7.7) Input/Output With Schmitt Trigger (PEU Package Only)
      23. 6.12.23 Port P7 (P7.0 to P7.7) Input/Output With Schmitt Trigger (PZ Package Only)
      24. 6.12.24 Port P8 (P8.0 to P8.7) Input/Output With Schmitt Trigger (PEU Package Only)
      25. 6.12.25 Port P8 (P8.0) Input/Output With Schmitt Trigger (PZ Package Only)
      26. 6.12.26 Port P8 (P8.1) Input/Output With Schmitt Trigger (PZ Package Only)
      27. 6.12.27 Port P9 (P9.0 to P9.7) Input/Output With Schmitt Trigger (PEU Package Only)
      28. 6.12.28 Port P10 (P10.0 to P10.7) Input/Output With Schmitt Trigger (PEU Package Only)
      29. 6.12.29 Port P11 (P11.0) Input/Output With Schmitt Trigger (PEU Package Only)
      30. 6.12.30 Port P11 (P11.1) Input/Output With Schmitt Trigger (PEU Package Only)
      31. 6.12.31 Port P11 (P11.2 and P11.3) Input/Output With Schmitt Trigger (PEU Package Only)
      32. 6.12.32 Port P11 (P11.4 and P11.5) Input/Output With Schmitt Trigger (PEU Package Only)
      33. 6.12.33 Port PJ (PJ.0) JTAG Pin TDO, Input/Output With Schmitt Trigger or Output
      34. 6.12.34 Port PJ (PJ.0 to PJ.3) JTAG Pins TMS, TCK, TDI/TCLK, Input/Output With Schmitt Trigger or Output
    13. 6.13 Device Descriptors (TLV)
    14. 6.14 Identification
      1. 6.14.1 Revision Identification
      2. 6.14.2 Device Identification
      3. 6.14.3 JTAG Identification
  7. 7Applications, Implementation, and Layout
  8. 8器件和文档支持
    1. 8.1 入门和后续步骤
    2. 8.2 Device Nomenclature
    3. 8.3 工具与软件
    4. 8.4 文档支持
    5. 8.5 相关链接
    6. 8.6 社区资源
    7. 8.7 商标
    8. 8.8 静电放电警告
    9. 8.9 Glossary
  9. 9机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7 Applications, Implementation, and Layout

NOTE

Information in the following Applications section is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI's customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

The following resources provide application guidelines and best practices when designing with the MSP430F677x1A, MSP430F676x1A, and MSP430F674x1A devices.

Implementation of a 3-Phase Electronic Watt-Hour Meter Using the MSP430F677x(A)

This application report describes the implementation of a 3-phase electronic electricity meter using the TI MSP430F677x(A) metering processors. This application report includes the necessary information with regard to metrology software and hardware procedures for this single-chip implementation.

High-Accuracy 3-Phase Electricity Meter With Tamper Detection

The design implements a highly accurate 3-phase electric meter system using the MSP430F6779 smart meter SoC. It exceeds all of the requirements for ANSI C12.20 and IEC-62053 Class 0.2 meters. The F6779 SoC is the most integrated polyphase e-meter SoC with 512KB of flash. This allows developers to create a true single-chip smart e-meter with the highest performance and accuracy. In addition, this EVM has tamper detection capabilities which help the engineer develop methods to prevent theft of electricity from utilities.

Features

  • Comprehensive design includes schematics, BOMs, design files, and test reports.
  • Three-phase electricity meter which exceeds Class 0.2 accuracy requirements from ANSI and IEC
  • TI Energy Library firmware calculates all energy measurement parameters including active and reactive power and energy, RMS current and voltage, power factor, and line frequency.
  • Add-on communications modules for wireless communications standards such as ZigBee®, Wi-Fi®, Wireless M-Bus, and IEEE Std 802.15.4g, both 2.4 GHz and sub-1 GHz
  • Built-in 160-segment display powered from 3-phase line voltage
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