米6体育平台手机版

ZHCSDO6B May 2015 – September 2020 MSP430FG6425 , MSP430FG6426 , MSP430FG6625 , MSP430FG6626

PRODUCTION DATA

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机械数据 (封装 | 引脚)

PZ|100
- MTQF013A

散热焊盘机械数据 (封装 | 引脚)

PZ|100
- QFND428

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8.8.9.2 USCI (SPI Master Mode)

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)⁽¹⁾
(see Figure 8-11 and Figure 8-12)

PARAMETER		TEST CONDITIONS	V_CC	MIN	MAX	UNIT
f_USCI	USCI input clock frequency	SMCLK, ACLK, duty cycle = 50% ±10%			f_SYSTEM	MHz
t_SU,MI	SOMI input data setup time	PMMCOREV = 0	1.8 V	55		ns
		PMMCOREV = 0	3 V	38
		PMMCOREV = 3	2.4 V	30
		PMMCOREV = 3	3 V	25
t_HD,MI	SOMI input data hold time	PMMCOREV = 0	1.8 V	0		ns
		PMMCOREV = 0	3 V	0
		PMMCOREV = 3	2.4 V	0
		PMMCOREV = 3	3 V	0
t_VALID,MO	SIMO output data valid time⁽²⁾	UCLK edge to SIMO valid, C_L = 20 pF, PMMCOREV = 0	1.8 V		20	ns
		UCLK edge to SIMO valid, C_L = 20 pF, PMMCOREV = 0	3 V		18
		UCLK edge to SIMO valid, C_L = 20 pF, PMMCOREV = 3	2.4 V		16
		UCLK edge to SIMO valid, C_L = 20 pF, PMMCOREV = 3	3 V		15
t_HD,MO	SIMO output data hold time⁽³⁾	C_L = 20 pF, PMMCOREV = 0	1.8 V	–10		ns
		C_L = 20 pF, PMMCOREV = 0	3 V	–8
		C_L = 20 pF, PMMCOREV = 3	2.4 V	–10
		C_L = 20 pF, PMMCOREV = 3	3 V	–8

(1) f_UCxCLK = 1/2t_LO/HI with t_LO/HI ≥ max(t_{VALID,MO(USCI)} + t_SU,SI(Slave), t_SU,MI(USCI) + t_{VALID,SO(Slave)})
For the slave parameters t_SU,SI(Slave) and t_{VALID,SO(Slave)}, see the SPI parameters of the attached slave.

(2) Specifies the time to drive the next valid data to the SIMO output after the output changing UCLK clock edge. See the timing diagrams in Figure 8-11 and Figure 8-12.

(3) Specifies how long data on the SIMO output is valid after the output changing UCLK clock edge. Negative values indicate that the data on the SIMO output can become invalid before the output changing clock edge observed on UCLK. See the timing diagrams in Figure 8-11 and Figure 8-12.

Figure 8-11 SPI Master Mode, CKPH = 0

Figure 8-12 SPI Master Mode, CKPH = 1

Section 8.8.9.3 lists the characteristics of the USCI in SPI slave mode.