Table 5-4 XT1 Crystal Oscillator (High Frequency)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(1)
PARAMETER |
TEST CONDITIONS |
VCC |
MIN |
TYP |
MAX |
UNIT |
fHFXT |
HFXT oscillator crystal frequency, crystal mode |
XT1BYPASS = 0, XTS = 1, XT1HFFREQ = 00 |
|
1 |
|
4 |
MHz |
XT1BYPASS = 0, XTS = 1, XT1HFFREQ = 01 |
|
4.01 |
|
6 |
XT1BYPASS = 0, XTS = 1, XT1HFFREQ = 10 |
|
6.01 |
|
16 |
fHFXT,SW |
HFXT oscillator logic-level square-wave input frequency, bypass mode |
XT1BYPASS = 1, XTS = 1 (4)(5) |
|
1 |
|
16 |
MHz |
DCHFXT |
HFXT oscillator duty cycle |
Measured at ACLK, fHFXT,HF = 4 MHz(8) |
|
40% |
|
60% |
|
DCHFXT, SW |
HFXT oscillator logic-level square-wave input duty cycle |
XT1BYPASS = 1 |
|
40% |
|
60% |
|
OAHFXT |
Oscillation allowance for HFXT crystals(6) |
XT1BYPASS = 0, XT1HFSEL = 1,
fHFXT,HF = 16 MHz, CL,eff = 18 pF |
|
|
2.4 |
|
kΩ |
tSTART,HFXT |
Start-up time(7) |
fOSC = 4 MHz, XTS = 1(8),
XT1BYPASS = 0, XT1HFFREQ = 00,
XT1DRIVE = 3, TA = 25°C, CL,eff = 18 pF |
|
|
1.6 |
|
ms |
fOSC = 16 MHz, XTS = 1(8),
XT1BYPASS = 0, XT1HFFREQ = 00,
XT1DRIVE = 3, TA = 25°C, CL,eff = 18 pF |
|
|
1.1 |
|
CL,eff |
Integrated effective load capacitance(2)(3) |
|
|
|
1 |
|
pF |
fFault,HFXT |
Oscillator fault frequency(9)(10) |
|
|
0 |
|
800 |
kHz |
(1) To improve EMI on the HFXT oscillator, the following guidelines should be observed.
- Keep the trace between the device and the crystal as short as possible.
- Design a good ground plane around the oscillator pins.
- Prevent crosstalk from other clock or data lines into oscillator pins XIN and XOUT.
- Avoid running PCB traces under or adjacent to the XIN and XOUT pins.
- Use assembly materials and processes that avoid any parasitic load on the oscillator XIN and XOUT pins.
- If conformal coating is used, make sure that it does not induce capacitive or resistive leakage between the oscillator pins.
(2) Includes parasitic bond and package capacitance (approximately 2 pF per pin).
Because the PCB adds additional capacitance, TI recommends verifying the correct load by measuring the oscillator frequency through MCLK or SMCLK. For a correct setup, the effective load capacitance should always match the specification of the used crystal.
(3) Requires external capacitors at both terminals. Values are specified by crystal manufacturers. Recommended values supported are 14 pF, 16 pF, and 18 pF. Maximum shunt capacitance of 7 pF.
(4) When XT1BYPASS is set, HFXT circuits are automatically powered down. Input signal is a digital square wave with parametrics defined in the Schmitt-trigger Inputs section of this datasheet. Duty cycle requirements are defined by DCHFXT, SW.
(5) Maximum frequency of operation of the entire device cannot be exceeded.
(6) Oscillation allowance is based on a safety factor of 5 for recommended crystals.
(7) Includes start-up counter of 4096 clock cycles.
(8) 4-MHz crystal used for lab characterization: Abracon HC49/U AB-4.000MHZ-B2
16-MHz crystal used for lab characterization: Abracon HC49/U AB-16.000MHZ-B2
(9) Frequencies above the MAX specification do not set the fault flag. Frequencies between the MIN and MAX might set the flag. A static condition or stuck at fault condition sets the flag.
(10) Measured with logic-level input frequency but also applies to operation with crystals.
Table 5-5 lists the characteristics of the DCO FLL.