6.10.8 Timers (Timer0_A3, Timer1_A3, Timer2_A2 and Timer3_A2)

The Timer0_A3 and Timer1_A3 modules are 16-bit timers and counters with three capture/compare registers each. Both timers support multiple captures or compares, PWM outputs, and interval timing (see Table 6-11 and Table 6-12). Both timers have extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each capture/compare register.

The CCR0 registers on Timer0_A3 and Timer1_A3 are not externally connected and can be used only for hardware period timing and interrupt generation. In Up mode, these CCR0 registers can be used to set the overflow value of the counter.

The interconnection of Timer0_A3 and Timer1_A3 can be used to modulate the eUSCI_A pin of UCA0TXD/UCA0SIMO in either ASK or FSK mode, with which a user can easily acquire a modulated infrared command for directly driving an external IR diode. The IR functions are fully controlled by SYS configuration registers 1 including IREN (enable), IRPSEL (polarity select), IRMSEL (mode select), IRDSSEL (data select), and IRDATA (data) bits. For more information, see the System Resets, Interrupts, and Operating Modes, System Control Module (SYS) chapter in the MP430FR4xx and MP430FR2xx Family User's Guide.

The Timer2_A2 and Timer3_A2 modules are 16-bit timers and counters with two capture/compare registers each. Both timers support multiple captures or compares and interval timing (see Table 6-13 and Table 6-14). Both timers have extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each capture register.

The CCR0 registers on Timer2_TA2 and Timer3_TA2 are not externally connected and can be used only for hardware period timing and interrupt generation. In Up mode, these CCR0 registers can be used to set the overflow value of the counter. Timer2_A2 and Timer3_A2 are only internally connected and do not support PWM output.